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/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/cloog/
H A Dmxm-shared.st1 …g0, g1, g2, g3, g4, t0, t1] -> { S1[g0 + t1, i1] : (exists (e0 = floor((g1)/128), e1 = floor((128b…
3 …g0, g1, g2, g3, g4, t0, t1] -> { [] : exists (e0 = floor((g0)/8), e1 = floor((-128b1 + g1)/4096), …
5 …schedule: "[N, b0, b1, g0, g1, g2, g3, g4, t0, t1] -> [{ S1[i0, i1] -> [(-g1 + i1)] }, { S1[i0, i1…
6 options: "[N, b0, b1, g0, g1, g2, g3, g4, t0, t1] -> { separate[i0] }"
/llvm-project-15.0.7/llvm/test/MC/Sparc/
H A Dsparc-synthetic-instructions.s57 ! CHECK: xnor %g1, %g0, %g2 ! encoding: [0x84,0x38,0x40,0x00]
59 ! CHECK: xnor %g1, %g0, %g1 ! encoding: [0x82,0x38,0x40,0x00]
62 ! CHECK: sub %g0, %g1, %g2 ! encoding: [0x84,0x20,0x00,0x01]
64 ! CHECK: sub %g0, %g1, %g1 ! encoding: [0x82,0x20,0x00,0x01]
85 ! CHECK: andcc %g2, %g1, %g0 ! encoding: [0x80,0x88,0x80,0x01]
87 ! CHECK: andcc %g2, 4, %g0 ! encoding: [0x80,0x88,0xa0,0x04]
102 ! CHECK: mov %g0, %g1 ! encoding: [0x82,0x10,0x00,0x00]
104 ! CHECK: stb %g0, [%g1+%g2] ! encoding: [0xc0,0x28,0x40,0x02]
106 ! CHECK: sth %g0, [%g1+%g2] ! encoding: [0xc0,0x30,0x40,0x02]
108 ! CHECK: st %g0, [%g1+%g2] ! encoding: [0xc0,0x20,0x40,0x02]
[all …]
H A Dsparc-alu-instructions.s4 ! CHECK: add %g0, %g0, %g0 ! encoding: [0x80,0x00,0x00,0x00]
5 add %g0, %g0, %g0
79 ! CHECK: restore %g0, %g0, %g1 ! encoding: [0x83,0xe8,0x00,0x00]
80 restore %g0, %g0, %g1
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dlea-recursion.ll18 ; CHECK-NEXT: movl g0(%rip), %eax
22 ; CHECK-NEXT: movl %eax, g0+4(%rip)
26 ; CHECK-NEXT: movl %eax, g0+8(%rip)
30 ; CHECK-NEXT: movl %eax, g0+12(%rip)
34 ; CHECK-NEXT: movl %eax, g0+16(%rip)
38 ; CHECK-NEXT: movl %eax, g0+20(%rip)
42 ; CHECK-NEXT: movl %eax, g0+24(%rip)
45 ; CHECK-NEXT: movl %eax, g0+28(%rip)
48 %tmp4 = load i32, ptr @g0 ; <i32> [#uses=1]
52 store i32 %tmp10, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 1)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dbug27085.ll4 ; CHECK-LONG: call ##g0@GDPLT
5 ; CHECK-LONG-NOT: call g0@GDPLT
6 ; CHECK: call g0@GDPLT
7 ; CHECK-NOT: call ##g0@GDPLT
11 @g0 = internal thread_local global i32 0, align 4
16 store volatile i32 1, i32* @g0, align 4, !tbaa !1
23 %v0 = load volatile i32, i32* @g0, align 4, !tbaa !1
28 store volatile i32 0, i32* @g0, align 4, !tbaa !1
H A Dpacked-store.ll9 @g0 = common global %s.0 zeroinitializer, align 1
16 store i8 1, i8* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 1), align 1
17 %v1 = load i16, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 1
19 store i16 %v2, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 1
25 %v5 = load i16, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 1
29 store i16 %v8, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 1
33 %v9 = load i16, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 1
37 store i16 %v12, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 1
H A Dstore-imm-large-stack.ll7 @g0 = external global [1024 x i8], align 8
18 %v3 = load i8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i32 9), align 1
19 %v4 = load i8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i32 10), align 2
25 …%v5 = load i16, i16* bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i3…
27 …%v6 = load i32, i32* bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i3…
29 …%v7 = load i16, i16* bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i3…
31 …%v8 = load i16, i16* bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i3…
33 …%v9 = load i32, i32* bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i3…
95 %v29 = load i8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i32 33), align 1
97 %v30 = load i8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @g0, i32 0, i32 34), align 2
[all …]
H A Dcommon-global-addr.ll4 @g0 = external global i32
9 ; CHECK: ##g0
10 ; CHECK-NOT: ##g0
11 %v0 = load i32, i32* @g0, align 1
13 store i32 %v1, i32* @g0, align 1
H A Dgp-plus-offset-load.ll7 @g0 = common global %s.0 zeroinitializer, align 4
10 ; CHECK: r{{[0-9]+}} = memw(##g0+4)
17 %v1 = load i32, i32* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 3), align 4
26 ; CHECK: r{{[0-9]+}} = memub(##g0+1)
33 %v1 = load i8, i8* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 1), align 1
42 ; CHECK: r{{[0-9]+}} = memuh(##g0+2)
49 %v1 = load i16, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 2
H A Daggressive_licm.ll9 @g0 = common global [4 x i16] zeroinitializer, align 8
15 call void @f1(i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 0), i16* %v0) #0
21 %v3 = load i32, i32* bitcast ([4 x i16]* @g0 to i32*), align 8
25 …%v7 = load i32, i32* bitcast (i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 2…
46 …store i16 %v14, i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 0), align 8, !t…
47 …store i16 %v13, i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 1), align 2, !t…
48 …store i16 %v12, i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 2), align 4, !t…
49 …store i16 0, i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 3), align 2, !tbaa…
55 …call void @f2(i16* getelementptr inbounds ([4 x i16], [4 x i16]* @g0, i32 0, i32 0), i16 signext %…
H A Dmem-ops-sub_i16.ll5 @g0 = unnamed_addr global i16 -32, align 2
10 %v0 = load i16, i16* @g0, align 1, !tbaa !4
17 store i16 %v6, i16* @g0, align 2, !tbaa !4
23 %v0 = load i16, i16* @g0, align 2, !tbaa !4
27 store i16 %v3, i16* @g0, align 2, !tbaa !4
29 %v4 = load i16, i16* @g0, align 2, !tbaa !4
H A Dmem-ops-sub.ll5 @g0 = unnamed_addr global i8 112, align 1
10 %v0 = load i8, i8* @g0, align 1, !tbaa !4
17 store i8 %v6, i8* @g0, align 1, !tbaa !4
23 %v0 = load i8, i8* @g0, align 1, !tbaa !4
27 store i8 %v3, i8* @g0, align 1, !tbaa !4
29 %v4 = load i8, i8* @g0, align 1, !tbaa !4
H A Dmem-ops-sub_01.ll5 @g0 = unnamed_addr global i8 112, align 1
10 %v0 = load i8, i8* @g0, align 1, !tbaa !4
17 store i8 %v6, i8* @g0, align 1, !tbaa !4
23 %v0 = load i8, i8* @g0, align 1, !tbaa !4
27 store i8 %v3, i8* @g0, align 1, !tbaa !4
29 %v4 = load i8, i8* @g0, align 1, !tbaa !4
H A Dmem-ops-sub_i16_01.ll5 @g0 = unnamed_addr global i16 -32, align 2
10 %v0 = load i16, i16* @g0, align 1, !tbaa !4
17 store i16 %v6, i16* @g0, align 2, !tbaa !4
23 %v0 = load i16, i16* @g0, align 2, !tbaa !4
27 store i16 %v3, i16* @g0, align 2, !tbaa !4
29 %v4 = load i16, i16* @g0, align 2, !tbaa !4
H A Dstore_abs.ll17 @g0 = external global %s.0, align 4
22 … %s.1* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 0), %s.1** getelementptr inbounds (%s.0…
23 … %s.1* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 0), %s.1** getelementptr inbounds (%s.0…
H A Daddrmode-globoff.mir4 @g0 = external global [16 x i16], align 8
18 ; Make sure that the offset in @g0 is 8.
19 ; CHECK: S4_storerh_ur killed $r0, 2, @g0 + 8, $r0
21 $r1 = A2_tfrsi @g0+4
H A Dgp-plus-offset-store.ll6 @g0 = common global %s.0 zeroinitializer, align 4
9 ; CHECK: memb(##g0+1) = r{{[0-9]+}}
16 store i8 %a2, i8* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 1), align 1
24 ; CHECK: memh(##g0+2) = r{{[0-9]+}}
31 store i16 %a2, i16* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 2), align 2
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dconst-arithmetic.c6 extern struct { unsigned char a, b; } g0[]; variable
7 void *g1[] = {g0 + -1, g0 + -23 };
8 void *g2[] = {g0 - 1, g0 - 23 };
H A Dbitfield-assign.c22 int g0(void);
26 if ((s.f0 = 3) != -1) g0(); in f0()
31 if ((s.f1 = 3) != 1) g0(); in f1()
36 if ((s.f2 = 3) != 3) g0(); in f2()
H A Dasm-attrs.c17 int g0, g1; variable
28 __asm__ ("foo4" : "=r"(g1) : "r"(a), "m"(g0)); in test_attrs()
29 __asm__ ("foo5" : "=r"(g1) : "r"(a), "Q"(g0)); in test_attrs()
30 __asm__ ("foo6" : "=r"(g1), "=m"(g0) : "r"(a)); in test_attrs()
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dloh.mir9 @g0 = external global i32
32 ; CHECK-NEXT: $x0 = ADRP target-flags(aarch64-page) @g0
34 $x0 = ADRP target-flags(aarch64-page) @g0
47 $x1 = ADRP target-flags(aarch64-page) @g0
49 $x1 = ADDXri $x1, target-flags(aarch64-pageoff) @g0, 0
50 $x20 = ADRP target-flags(aarch64-page) @g0
56 $x9 = ADRP target-flags(aarch64-page) @g0
63 $x10 = ADRP target-flags(aarch64-page) @g0
70 $x10 = ADRP target-flags(aarch64-page) @g0
186 $x10 = ADRP target-flags(aarch64-page) @g0
[all …]
H A Dmerge-scoped-aa-store.ll15 define void @blam0(<3 x float>* %g0, <3 x float>* %g1) {
17 ; MIR: LDRDui %0, 0 :: (load (s64) from %ir.g0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
20 %tmp5 = load <3 x float>, <3 x float>* %g0, align 4, !alias.scope !0, !noalias !1
24 %tmp8 = load <3 x float>, <3 x float>* %g0, align 4, !alias.scope !0, !noalias !1
31 define void @blam1(<3 x float>* %g0, <3 x float>* %g1) {
37 ; MIR: LDRDui %0, 0 :: (load (s64) from %ir.g0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
40 %tmp5 = load <3 x float>, <3 x float>* %g0, align 4, !alias.scope !0, !noalias !1
44 %tmp8 = load <3 x float>, <3 x float>* %g0, align 4, !alias.scope !0, !noalias !1
/llvm-project-15.0.7/llvm/test/Analysis/GlobalsModRef/
H A Daddrspacecast.ll3 @g0 = internal addrspace(3) global i32 undef
7 ; CHECK-DAG: NoAlias: i32* %p, i32 addrspace(3)* @g0
8 ; CHECK-DAG: MustAlias: i32* %gp, i32 addrspace(3)* @g0
10 load i32, i32 addrspace(3)* @g0
11 %gp = addrspacecast i32 addrspace(3)* @g0 to i32*
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dmno-ldc1-sdc1.ll62 @g0 = common global double 0.000000e+00, align 8
81 ; 32R1-LE-STATIC-DAG: lui $[[R0:[0-9]+]], %hi(g0)
88 ; 32R2-LE-STATIC-DAG: lui $[[R0:[0-9]+]], %hi(g0)
95 ; 32R6-LE-STATIC-DAG: lui $[[R0:[0-9]+]], %hi(g0)
145 %0 = load double, double* @g0, align 8
168 ; 32R1-LE-STATIC-DAG: lui $[[R2:[0-9]+]], %hi(g0)
169 ; 32R1-LE-STATIC-DAG: sw $[[R0]], %lo(g0)($[[R2]])
175 ; 32R2-LE-STATIC-DAG: lui $[[R2:[0-9]+]], %hi(g0)
176 ; 32R2-LE-STATIC-DAG: sw $[[R0]], %lo(g0)($[[R2]])
182 ; 32R6-LE-STATIC-DAG: lui $[[R2:[0-9]+]], %hi(g0)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SPARC/
H A Dfloat-constants.ll9 ; CHECK: mov %g0, %o1
10 ; CHECK-LE: mov %g0, %o0
22 ; CHECK: mov %g0, %o1
23 ; CHECK-LE: mov %g0, %o0
38 ; CHECK: mov %g0, %o1
41 ; CHECK-LE: mov %g0, %o0

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