Home
last modified time | relevance | path

Searched refs:fsw (Results 1 – 25 of 51) sorted by relevance

123

/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dcallee-saved-fpr32s.ll67 ; ILP32-NEXT: fsw fs4, 96(a1)
68 ; ILP32-NEXT: fsw fs3, 92(a1)
69 ; ILP32-NEXT: fsw fs2, 88(a1)
70 ; ILP32-NEXT: fsw fs1, 84(a1)
71 ; ILP32-NEXT: fsw fs0, 80(a1)
74 ; ILP32-NEXT: fsw ft9, 68(a1)
75 ; ILP32-NEXT: fsw ft8, 64(a1)
76 ; ILP32-NEXT: fsw fa7, 60(a1)
77 ; ILP32-NEXT: fsw fa6, 56(a1)
78 ; ILP32-NEXT: fsw fa5, 52(a1)
[all …]
H A Dfastcc-float.ll53 ; CHECK-NEXT: fsw fs11, 44(sp)
55 ; CHECK-NEXT: fsw fs9, 36(sp)
56 ; CHECK-NEXT: fsw fs8, 32(sp)
57 ; CHECK-NEXT: fsw fs7, 28(sp)
58 ; CHECK-NEXT: fsw fs6, 24(sp)
59 ; CHECK-NEXT: fsw fs5, 20(sp)
60 ; CHECK-NEXT: fsw fs4, 16(sp)
61 ; CHECK-NEXT: fsw fs3, 12(sp)
62 ; CHECK-NEXT: fsw fs2, 8(sp)
63 ; CHECK-NEXT: fsw fs1, 4(sp)
[all …]
H A Dcalling-conv-vector-float.ll44 ; RV64-NEXT: fsw ft0, 12(a0)
45 ; RV64-NEXT: fsw ft1, 8(a0)
46 ; RV64-NEXT: fsw ft3, 4(a0)
47 ; RV64-NEXT: fsw ft5, 0(a0)
56 ; RV64LP64F-NEXT: fsw ft3, 12(a0)
57 ; RV64LP64F-NEXT: fsw ft2, 8(a0)
58 ; RV64LP64F-NEXT: fsw ft1, 4(a0)
59 ; RV64LP64F-NEXT: fsw ft0, 0(a0)
H A Dinterrupt-attr.ll119 ; CHECK-RV32-F-NEXT: fsw ft7, 96(sp) # 4-byte Folded Spill
120 ; CHECK-RV32-F-NEXT: fsw fa0, 92(sp) # 4-byte Folded Spill
121 ; CHECK-RV32-F-NEXT: fsw fa1, 88(sp) # 4-byte Folded Spill
122 ; CHECK-RV32-F-NEXT: fsw fa2, 84(sp) # 4-byte Folded Spill
123 ; CHECK-RV32-F-NEXT: fsw fa3, 80(sp) # 4-byte Folded Spill
124 ; CHECK-RV32-F-NEXT: fsw fa4, 76(sp) # 4-byte Folded Spill
125 ; CHECK-RV32-F-NEXT: fsw fa5, 72(sp) # 4-byte Folded Spill
126 ; CHECK-RV32-F-NEXT: fsw fa6, 68(sp) # 4-byte Folded Spill
127 ; CHECK-RV32-F-NEXT: fsw fa7, 64(sp) # 4-byte Folded Spill
128 ; CHECK-RV32-F-NEXT: fsw ft8, 60(sp) # 4-byte Folded Spill
[all …]
H A Dinterrupt-attr-nocall.ll214 ; CHECK-RV32IF-NEXT: fsw ft0, 8(sp) # 4-byte Folded Spill
215 ; CHECK-RV32IF-NEXT: fsw ft1, 4(sp) # 4-byte Folded Spill
222 ; CHECK-RV32IF-NEXT: fsw ft0, %lo(d)(a0)
241 ; CHECK-RV32IFD-NEXT: fsw ft0, %lo(d)(a0)
312 ; CHECK-RV32IF-NEXT: fsw ft0, 16(sp) # 4-byte Folded Spill
313 ; CHECK-RV32IF-NEXT: fsw ft1, 12(sp) # 4-byte Folded Spill
321 ; CHECK-RV32IF-NEXT: fsw ft0, %lo(d)(a0)
345 ; CHECK-RV32IFD-NEXT: fsw ft0, %lo(d)(a0)
439 ; CHECK-RV32IF-NEXT: fsw ft7, 96(sp) # 4-byte Folded Spill
440 ; CHECK-RV32IF-NEXT: fsw fa0, 92(sp) # 4-byte Folded Spill
[all …]
H A Dfloat-mem.ll26 ; CHECKIF-LABEL: fsw:
29 ; CHECKIF-NEXT: fsw ft0, 0(a0)
30 ; CHECKIF-NEXT: fsw ft0, 32(a0)
51 ; CHECKIF-NEXT: fsw fa0, %lo(G)(a0)
53 ; CHECKIF-NEXT: fsw fa0, 36(a1)
71 ; RV32IF-NEXT: fsw fa0, -273(a0)
80 ; RV64IF-NEXT: fsw fa0, -273(a0)
96 ; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
111 ; RV64IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
135 ; RV32IF-NEXT: fsw ft0, 8(sp)
[all …]
H A Dinline-asm-clobbers.ll27 ; RV32I-NOT: fsw fs0, {{[0-9]+}}(sp)
33 ; RV64I-NOT: fsw fs0, {{[0-9]+}}(sp)
39 ; RV32IF-NEXT: fsw fs0, {{[0-9]+}}(sp)
40 ; RV32IF-NEXT: fsw fs1, {{[0-9]+}}(sp)
45 ; RV64IF-NEXT: fsw fs0, {{[0-9]+}}(sp)
46 ; RV64IF-NEXT: fsw fs1, {{[0-9]+}}(sp)
H A Dinline-asm-f-abi-names.ll344 ; RV32IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
356 ; RV64IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
373 ; RV32IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
385 ; RV64IF-NEXT: fsw fs0, 12(sp) # 4-byte Folded Spill
402 ; RV32IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
414 ; RV64IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
431 ; RV32IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
443 ; RV64IF-NEXT: fsw fs1, 12(sp) # 4-byte Folded Spill
776 ; RV32IF-NEXT: fsw fs2, 12(sp) # 4-byte Folded Spill
788 ; RV64IF-NEXT: fsw fs2, 12(sp) # 4-byte Folded Spill
[all …]
H A Dmachine-cse.ll123 ; RV32-NEXT: fsw ft0, 0(a0)
126 ; RV32-NEXT: fsw ft0, 0(a0)
133 ; RV64-NEXT: fsw ft0, 0(a0)
136 ; RV64-NEXT: fsw ft0, 0(a0)
226 ; RV32-NEXT: fsw ft0, 0(a0)
229 ; RV32-NEXT: fsw ft0, 0(a0)
236 ; RV64-NEXT: fsw ft0, 0(a0)
239 ; RV64-NEXT: fsw ft0, 0(a0)
333 ; RV32-NEXT: fsw ft0, 0(a0)
336 ; RV32-NEXT: fsw ft0, 0(a0)
[all …]
H A Dcalling-conv-rv32f-ilp32.ll63 ; RV32IF-NEXT: fsw ft0, 4(sp)
68 ; RV32IF-NEXT: fsw ft2, 0(sp)
H A Dfloat-round-conv-sat.ll27 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
111 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
182 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
266 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
337 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
421 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
492 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
576 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
647 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
731 ; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
H A Dhalf-round-conv-sat.ll27 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
114 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
188 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
275 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
349 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
436 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
510 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
597 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
671 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
758 ; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Dcompress-rv32f.s18 fsw ft0, 124(sp) label
20 # CHECK-ALIAS: fsw ft0, 124(sp)
28 fsw fs0, 124(s0) label
30 # CHECK-ALIAS: fsw fs0, 124(s0)
31 # CHECK-INST: c.fsw fs0, 124(s0)
H A Drv32f-valid.s31 # CHECK-ASM-AND-OBJ: fsw ft6, 2047(s4)
33 fsw f6, 2047(s4) label
34 # CHECK-ASM-AND-OBJ: fsw ft7, -2048(s5)
36 fsw f7, -2048(s5) label
37 # CHECK-ASM-AND-OBJ: fsw fs0, -2048(s6)
39 fsw f8, %lo(2048)(s6) label
40 # CHECK-ASM-AND-OBJ: fsw fs1, 999(s7)
42 fsw f9, 999(s7) label
H A Drvf-pseudos.s11 # CHECK: fsw fa2, %pcrel_lo(.Lpcrel_hi1)(a3)
12 fsw fa2, a_symbol, a3 label
H A Drv32fc-aliases-valid.s9 # CHECK-EXPAND: c.fsw fs0, 0(s1)
10 c.fsw f8, (x9)
H A Drvf-aliases-valid.s29 # CHECK-INST: fsw ft0, 0(a0)
30 # CHECK-ALIAS: fsw ft0, 0(a0)
31 fsw f0, (a0) label
116 # CHECK-INST: fsw ft0, 0(a0)
117 # CHECK-ALIAS: fsw ft0, 0(a0)
118 fsw f0, (x10) label
H A Drv32f-invalid.s6 fsw ft2, 2048(a1) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel… label
10 fsw ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction label
H A Drv32fc-valid.s38 # CHECK-ASM-AND-OBJ: c.fsw fa2, 124(a1)
43 c.fsw fa2, 124(a1)
H A Drv64zfinx-invalid.s7 fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction label
H A Drv32fc-invalid.s12 c.fsw fs1, 128(sp) # CHECK: :[[@LINE]]:13: error: immediate must be a multiple of 4 bytes in the r…
H A Drv32zhinxmin-invalid.s8 fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction label
H A Drv64zfh-invalid.s11 fsw ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction label
H A Drv32zhinx-invalid.s8 fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction label
H A Drv32zfinx-invalid.s8 fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction label

123