| /llvm-project-15.0.7/llvm/test/Object/AArch64/ |
| H A D | chained-fixups-header.test | 2 RUN: cat %p/../Inputs/MachO/chained-fixups.yaml \ 6 HEADER1: truncated or malformed object (bad chained fixups: unknown version: 171) 8 RUN: cat %p/../Inputs/MachO/chained-fixups.yaml \ 12 HEADER2: truncated or malformed object (bad chained fixups: unknown imports format: 171) 14 RUN: cat %p/../Inputs/MachO/chained-fixups.yaml \ 18 …R3: truncated or malformed object (bad chained fixups: image starts offset 1 overlaps with chained… 20 RUN: cat %p/../Inputs/MachO/chained-fixups.yaml \ 24 HEADER4: truncated or malformed object (bad chained fixups: image starts end 33031 extends past end…
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| /llvm-project-15.0.7/llvm/test/tools/llvm-objcopy/MachO/ |
| H A D | strip-all.test | 5 # RUN: yaml2obj %p/Inputs/strip-chained-fixups.yaml -o %t.fixups 19 # RUN: llvm-objcopy --strip-all %t.fixups %t.fixups.stripped 20 # RUN: llvm-readobj --sections --relocations --symbols %t.fixups.stripped \ 40 # RUN: llvm-strip %t.fixups -o %t7 41 # RUN: llvm-strip --strip-all %t.fixups -o %t8 42 # RUN: cmp %t7 %t.fixups.stripped 43 # RUN: cmp %t8 %t.fixups.stripped
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| /llvm-project-15.0.7/flang/lib/Optimizer/CodeGen/ |
| H A D | TargetRewrite.cpp | 478 llvm::SmallVector<FixupTy> fixups; in convertSignature() local 536 doComplexArg(func, cmplx, newInTys, fixups); in convertSignature() 565 const auto fixupSize = fixups.size(); in convertSignature() 569 const auto &fixup = fixups[i]; in convertSignature() 719 for (auto &fixup : fixups) in convertSignature() 735 B &newInTys, C &fixups) { in doComplexReturn() argument 749 fixups.emplace_back( in doComplexReturn() 757 fixups.emplace_back( in doComplexReturn() 799 fixups.emplace_back( in doComplexArg() 815 fixups.emplace_back( in doComplexArg() [all …]
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| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | mips64eb-fixups.s | 3 .section .fixups,"",@progbits 27 # CHECK: Name: .fixups (12)
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| H A D | 2012-06-15-lsr-noaddrmode.ll | 13 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32 21 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32 26 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32 34 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/ |
| H A D | fixups-diff.ll | 12 ; LLVM, which is already covered by the fixups-expr.s test. 43 !1 = !DIFile(filename: "fixups-diff.ll", directory: "test/MC/RISCV")
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| H A D | fixups-relax-diff.ll | 6 ; path through LLVM, which is already covered by the fixups-expr.s test.
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| /llvm-project-15.0.7/llvm/test/MC/Hexagon/ |
| H A D | pcrel.s | 4 # make sure the fixups emitted match what is
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| H A D | got.s | 4 # make sure the fixups emitted match what is
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRFixupKinds.h | 133 namespace fixups {
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| H A D | AVRMCCodeEmitter.cpp | 109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget() 223 AVR::fixups::adjustBranchTarget(Target); in encodeCallTarget()
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| H A D | AVRAsmBackend.cpp | 84 AVR::fixups::adjustBranchTarget(Value); in adjustBranch() 95 AVR::fixups::adjustBranchTarget(Value); in adjustRelativeBranch()
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| /llvm-project-15.0.7/polly/lib/External/isl/imath/tests/gmp-compat-test/ |
| H A D | gendata.py | 340 if name not in fixups: 342 return fixups[name](args) 359 fixups = { variable
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| /llvm-project-15.0.7/llvm/test/MC/Sparc/ |
| H A D | sparc-little-endian.s | 13 ! ...and that fixups are applied to the correct bytes.
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| H A D | sparc-fixups.s | 4 ! Check that fixups are correctly applied.
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| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | arm-memory-instructions.s | 32 @ to the use of non-contiguous bit ranges for fixups in ARM. Once that's
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| /llvm-project-15.0.7/llvm/test/MC/RISCV/ |
| H A D | riscv64-64b-pcrel.s | 39 ## .apple_names/.apple_types are fixed-size and do not need fixups.
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| H A D | option-relax.s | 15 # linker-relaxation.s and fixups-expr.s for behaviour of the relax
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| H A D | fixups.s | 9 # Checks that fixups that can be resolved within the same object file are
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| /llvm-project-15.0.7/llvm/test/MC/COFF/ |
| H A D | switch-relocations.ll | 2 ; relax the fixups that are created for jump tables on x86-64. See PR7960.
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| /llvm-project-15.0.7/llvm/test/MC/PowerPC/ |
| H A D | ppc64-localentry.s | 45 # Verify that fixups to local function symbols are performed only
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| H A D | ppc64-fixup-apply.s | 7 # This checks that fixups that can be resolved within the same
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | machine-outliner-cfi-tail.mir | 5 # it requires fixups. Show that we include CFI instructions in tail call
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| /llvm-project-15.0.7/llvm/test/MC/Mips/micromips32r6/ |
| H A D | relocations.s | 6 # Check that the assembler can handle the documented syntax for fixups.
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| /llvm-project-15.0.7/lld/test/COFF/ |
| H A D | link-dll-stdcall.s | 8 ## Check that we normally warn about these fixups. If -stdcall-fixup:no
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