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/llvm-project-15.0.7/clang/test/FixIt/
H A Dfixit-availability.mm10 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:3-[[@LINE-1]]:3}:"if (@available(macOS 10.12, *)) {\n "
13 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:3-[[@LINE-1]]:3}:"if (@available(macOS 10.12, *)) {\n "
16 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:3-[[@LINE-1]]:3}:"if (@available(macOS 10.12, *)) {\n "
20 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:5-[[@LINE-1]]:5}:"if (@available(macOS 10.12, *)) {\n "
24 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:3-[[@LINE-1]]:3}:"if (@available(macOS 10.12, *)) {\n "
27 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:3-[[@LINE-1]]:3}:"if (@available(macOS 10.12, *)) {\n "
61 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:3-[[@LINE-1]]:3}:"if (@available(macOS 10.12, *)) {\n "
129 // CHECK: fix-it:{{.*}}:{[[@LINE-2]]:1-[[@LINE-2]]:1}:"API_AVAILABLE(macos(10.12))\n"
132 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:22-[[@LINE-1]]:22}:" API_AVAILABLE(macos(10.12))"
136 // CHECK: fix-it:{{.*}}:{[[@LINE-1]]:1-[[@LINE-1]]:1}:"API_AVAILABLE(macos(10.12))\n"
[all …]
H A Dformat.m12 // CHECK: fix-it:"{{.*}}":{10:11-10:13}:"%d"
13 // CHECK: fix-it:"{{.*}}":{11:11-11:14}:"%d"
19 // CHECK: fix-it:"{{.*}}":{16:11-16:13}:"%d"
20 // CHECK: fix-it:"{{.*}}":{17:11-17:14}:"%d"
21 // CHECK: fix-it:"{{.*}}":{18:11-18:13}:"%d"
28 // CHECK: fix-it:"{{.*}}":{25:11-25:13}:"%s"
29 // CHECK: fix-it:"{{.*}}":{27:11-27:14}:"%s"
35 // CHECK: fix-it:"{{.*}}":{31:11-31:13}:"%s"
36 // CHECK: fix-it:"{{.*}}":{33:11-33:14}:"%s"
37 // CHECK: fix-it:"{{.*}}":{34:11-34:13}:"%s"
[all …]
H A Dformat-darwin.m44 // CHECK: fix-it:"{{.*}}":{[[@LINE-5]]:11-[[@LINE-5]]:13}:"%ld"
47 // CHECK: fix-it:"{{.*}}":{[[@LINE-7]]:11-[[@LINE-7]]:13}:"%lu"
50 // CHECK: fix-it:"{{.*}}":{[[@LINE-9]]:11-[[@LINE-9]]:13}:"%d"
53 // CHECK: fix-it:"{{.*}}":{[[@LINE-11]]:11-[[@LINE-11]]:13}:"%u"
58 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:11-[[@LINE-2]]:13}:"%ld"
63 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:11-[[@LINE-2]]:13}:"%ld"
96 // CHECK-NOT: fix-it:{{.*}}:")"
100 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:11-[[@LINE-2]]:13}:"%ld"
102 // CHECK: fix-it:"{{.*}}":{[[@LINE-4]]:25-[[@LINE-4]]:25}:")"
249 // CHECK: fix-it:"{{.*}}":{[[@LINE-4]]:12-[[@LINE-4]]:13}:"d"
[all …]
H A Dnullability.mm13 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:14-[[@LINE-1]]:14}:" _Nonnull "
16 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:13-[[@LINE-1]]:13}:" _Nonnull"
19 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:14-[[@LINE-1]]:14}:" _Nonnull "
21 // No fix-its on either the macro definition or instantiation.
22 // CHECK-NOT: fix-it:"{{.*}}nullability.mm":{[[@LINE+2]]
23 // CHECK-NOT: fix-it:"{{.*}}nullability.mm":{[[@LINE+2]]
31 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:17-[[@LINE-1]]:17}:" _Nonnull"
35 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:14-[[@LINE-1]]:14}:"_Nonnull"
38 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:14-[[@LINE-1]]:14}:" _Nonnull"
41 // CHECK: fix-it:"{{.*}}nullability.mm":{[[@LINE-1]]:14-[[@LINE-1]]:14}:"_Nonnull"
[all …]
H A Dformat.mm12 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:16-[[@LINE-1]]:16}:"(unsigned short)"
15 // CHECK-NOT: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:13}:"%d"
16 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:16-[[@LINE-2]]:16}:"(unsigned short)"
21 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:16-[[@LINE-1]]:16}:"(unichar)"
24 // CHECK-NOT: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:13}:"%d"
25 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:16-[[@LINE-2]]:16}:"(unichar)"
28 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:13}:"%f"
29 // CHECK-NOT: fix-it:"{{.*}}":{[[@LINE-2]]:16-[[@LINE-2]]:16}:"(unichar)"
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Darith-fix.ll14 declare i64 @llvm.smul.fix.i64(i64, i64, i32)
15 declare <2 x i64> @llvm.smul.fix.v2i64(<2 x i64>, <2 x i64>, i32)
16 declare <4 x i64> @llvm.smul.fix.v4i64(<4 x i64>, <4 x i64>, i32)
17 declare <8 x i64> @llvm.smul.fix.v8i64(<8 x i64>, <8 x i64>, i32)
19 declare i32 @llvm.smul.fix.i32(i32, i32, i32)
24 declare i16 @llvm.smul.fix.i16(i16, i16, i32)
29 declare i8 @llvm.smul.fix.i8(i8, i8, i32)
248 declare i64 @llvm.umul.fix.i64(i64, i64, i32)
253 declare i32 @llvm.umul.fix.i32(i32, i32, i32)
258 declare i16 @llvm.umul.fix.i16(i16, i16, i32)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dfcvt-fixed.ll338 ret float %fix
348 ret float %fix
358 ret float %fix
428 ret half %fix
448 ret half %fix
468 ret half %fix
488 ret half %fix
590 ret half %fix
610 ret half %fix
630 ret half %fix
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dsmul_fix.ll4 declare i16 @llvm.smul.fix.i16(i16, i16, i32)
5 declare i16 @llvm.smul.fix.sat.i16(i16, i16, i32)
6 declare <2 x i16> @llvm.smul.fix.v2i16(<2 x i16>, <2 x i16>, i32)
10 ;; llvm.smul.fix (scalar)
18 %res = call i16 @llvm.smul.fix.i16(i16 %arg, i16 0, i32 15)
27 %res = call i16 @llvm.smul.fix.i16(i16 0, i16 %arg, i32 15)
36 %res = call i16 @llvm.smul.fix.i16(i16 %arg, i16 undef, i32 15)
63 %res = call i16 @llvm.smul.fix.i16(i16 2, i16 %arg, i32 1)
68 ;; llvm.smul.fix.sat (scalar)
126 ;; llvm.smul.fix (vector)
[all …]
/llvm-project-15.0.7/clang/test/SemaObjC/
H A Dattr-deprecated-replacement-fixit.m56 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:16}:"multi_new"
57 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:19-[[@LINE-2]]:28}:"parameter_new"
71 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:29-[[@LINE-2]]:29}:"toNonEmpty"
74 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:17}:"target"
75 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:20-[[@LINE-2]]:35}:""
76 // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:38-[[@LINE-3]]:47}:"emptyName"
79 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:16}:"renameExtra"
80 // CHECK: fix-it:"{{.*}}":{[[@LINE-2]]:23-[[@LINE-2]]:33}:"whiteSpace"
127 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:11-[[@LINE-1]]:44}:"-"
159 // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:9-[[@LINE-1]]:14}:"multi_new"
[all …]
H A Darc-bridged-cast.m36 // CHECK: fix-it:"{{.*}}":{35:20-35:35}:"__bridge_retained"
42 // CHECK: fix-it:"{{.*}}":{40:17-40:17}:"CFBridgingRelease("
43 // CHECK: fix-it:"{{.*}}":{40:36-40:36}:")"
48 // CHECK: fix-it:"{{.*}}":{45:30-45:30}:"CFBridgingRetain("
49 // CHECK: fix-it:"{{.*}}":{45:47-45:47}:")"
54 // CHECK: fix-it:"{{.*}}":{51:10-51:10}:"(__bridge CFTypeRef)"
55 // CHECK: fix-it:"{{.*}}":{51:10-51:10}:"CFBridgingRetain"
62 // CHECK: fix-it:"{{.*}}":{59:9-59:9}:"(__bridge CFTypeRef)"
63 // CHECK: fix-it:"{{.*}}":{59:9-59:9}:" CFBridgingRetain"
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dmulfix_combine.ll4 declare i32 @llvm.smul.fix.i32(i32, i32, i32 immarg)
5 declare i32 @llvm.umul.fix.i32(i32, i32, i32 immarg)
6 declare i32 @llvm.smul.fix.sat.i32(i32, i32, i32 immarg)
7 declare i32 @llvm.umul.fix.sat.i32(i32, i32, i32 immarg)
19 %tmp = call i32 @llvm.smul.fix.i32(i32 undef, i32 %y, i32 2)
28 %tmp = call i32 @llvm.smul.fix.i32(i32 0, i32 %y, i32 2)
37 %tmp = call i32 @llvm.umul.fix.i32(i32 undef, i32 %y, i32 2)
46 %tmp = call i32 @llvm.umul.fix.i32(i32 0, i32 %y, i32 2)
55 %tmp = call i32 @llvm.smul.fix.sat.i32(i32 undef, i32 %y, i32 2)
64 %tmp = call i32 @llvm.smul.fix.sat.i32(i32 0, i32 %y, i32 2)
[all …]
H A Dsmul_fix_sat_constants.ll6 declare i4 @llvm.smul.fix.sat.i4 (i4, i4, i32)
7 declare i32 @llvm.smul.fix.sat.i32 (i32, i32, i32)
8 declare i64 @llvm.smul.fix.sat.i64 (i64, i64, i32)
9 declare <4 x i32> @llvm.smul.fix.sat.v4i32(<4 x i32>, <4 x i32>, i32)
26 %tmp = call i64 @llvm.smul.fix.sat.i64(i64 3, i64 2, i32 2)
38 %tmp = call i64 @llvm.smul.fix.sat.i64(i64 3, i64 2, i32 0)
56 %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 2)
74 %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 32)
94 %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 63)
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dcommutative-intrinsics.ll42 ; CHECK-NEXT: [[R:%.*]] = call i35 @llvm.smul.fix.i35(i35 [[X:%.*]], i35 42, i32 2)
45 %r = call i35 @llvm.smul.fix.i35(i35 42, i35 %x, i32 2)
51 ; CHECK-NEXT: [[R:%.*]] = call i5 @llvm.umul.fix.i5(i5 [[X:%.*]], i5 10, i32 3)
54 %r = call i5 @llvm.umul.fix.i5(i5 42, i5 %x, i32 3)
60 ; CHECK-NEXT: [[R:%.*]] = call <2 x i35> @llvm.smul.fix.sat.v2i35(<2 x i35> [[X:%.*]], <2 x i35>…
63 %r = call <2 x i35> @llvm.smul.fix.sat.v2i35(<2 x i35> <i35 42, i35 43>, <2 x i35> %x, i32 4)
72 …%r = call <3 x i35> @llvm.umul.fix.sat.v3i35(<3 x i35> <i35 undef, i35 42, i35 43>, <3 x i35> %x, …
80 declare i35 @llvm.smul.fix.i35(i35, i35, i32)
81 declare i5 @llvm.umul.fix.i5(i5, i5, i32)
82 declare <2 x i35> @llvm.smul.fix.sat.v2i35(<2 x i35>, <2 x i35>, i32)
[all …]
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dvmov-vmvn-illegal-cases.s4 @ CHECK: error: invalid instruction, any one of the following would fix this:
8 @ CHECK: error: invalid instruction, any one of the following would fix this:
12 @ CHECK: error: invalid instruction, any one of the following would fix this:
16 @ CHECK: error: invalid instruction, any one of the following would fix this:
20 @ CHECK: error: invalid instruction, any one of the following would fix this:
25 @ CHECK: error: invalid instruction, any one of the following would fix this:
29 @ CHECK: error: invalid instruction, any one of the following would fix this:
33 @ CHECK: error: invalid instruction, any one of the following would fix this:
37 @ CHECK: error: invalid instruction, any one of the following would fix this:
41 @ CHECK: error: invalid instruction, any one of the following would fix this:
H A Dnegative-immediates-fail.s6 # CHECK: error: invalid instruction, any one of the following would fix this:
10 # CHECK: error: invalid instruction, any one of the following would fix this:
14 # CHECK: error: invalid instruction, any one of the following would fix this:
19 # CHECK: error: invalid instruction, any one of the following would fix this:
24 # CHECK: error: invalid instruction, any one of the following would fix this:
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/ConstProp/
H A Dsmul-fix.ll8 declare i32 @llvm.smul.fix.i32(i32, i32, i32)
46 %r = call <8 x i3> @llvm.smul.fix.v8i3(
57 %r = call <8 x i3> @llvm.smul.fix.v8i3(
68 %r = call <8 x i3> @llvm.smul.fix.v8i3(
79 %r = call <8 x i3> @llvm.smul.fix.v8i3(
90 %r = call <8 x i3> @llvm.smul.fix.v8i3(
101 %r = call <8 x i3> @llvm.smul.fix.v8i3(
112 %r = call <8 x i3> @llvm.smul.fix.v8i3(
123 %r = call <8 x i3> @llvm.smul.fix.v8i3(
134 %r = call <8 x i3> @llvm.smul.fix.v8i3(
[all …]
H A Dsmul-fix-sat.ll8 declare i32 @llvm.smul.fix.sat.i32(i32, i32, i32)
45 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
56 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
67 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
78 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
89 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
100 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
111 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
122 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
133 %r = call <8 x i3> @llvm.smul.fix.sat.v8i3(
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dirtranslator-fixed-point-intrinsics.ll16 %res = call i16 @llvm.smul.fix.i16(i16 %arg0, i16 %arg1, i32 7)
32 %res = call i16 @llvm.umul.fix.i16(i16 %arg0, i16 %arg1, i32 7)
80 %res = call i16 @llvm.sdiv.fix.i16(i16 %arg0, i16 %arg1, i32 7)
132 declare i16 @llvm.smul.fix.i16(i16, i16, i32 immarg) #0
133 declare i16 @llvm.umul.fix.i16(i16, i16, i32 immarg) #0
134 declare i16 @llvm.smul.fix.sat.i16(i16, i16, i32 immarg) #0
135 declare i16 @llvm.umul.fix.sat.i16(i16, i16, i32 immarg) #0
136 declare i16 @llvm.sdiv.fix.i16(i16, i16, i32 immarg) #1
137 declare i16 @llvm.udiv.fix.i16(i16, i16, i32 immarg) #1
138 declare i16 @llvm.sdiv.fix.sat.i16(i16, i16, i32 immarg) #1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Darith-fix.ll23 declare i64 @llvm.smul.fix.i64(i64, i64, i32)
24 declare i32 @llvm.smul.fix.i32(i32, i32, i32)
25 declare i16 @llvm.smul.fix.i16(i16, i16, i32)
26 declare i8 @llvm.smul.fix.i8 (i8 , i8 , i32)
131 %r0 = call i64 @llvm.smul.fix.i64(i64 %a0, i64 %b0, i32 3)
132 %r1 = call i64 @llvm.smul.fix.i64(i64 %a1, i64 %b1, i32 3)
133 %r2 = call i64 @llvm.smul.fix.i64(i64 %a2, i64 %b2, i32 3)
826 declare i64 @llvm.umul.fix.i64(i64, i64, i32)
827 declare i32 @llvm.umul.fix.i32(i32, i32, i32)
828 declare i16 @llvm.umul.fix.i16(i16, i16, i32)
[all …]
/llvm-project-15.0.7/llvm/test/MC/COFF/
H A Dcross-section-relative.ll15 …4 add(i64 sub(i64 ptrtoint(i32* @g3 to i64), i64 ptrtoint(i64* @t1 to i64)), i64 4), section ".fix"
17 @t2 = global i64 sub(i64 ptrtoint(i32* @g3 to i64), i64 ptrtoint(i64* @t2 to i64)), section ".fix"
19 …4 sub(i64 sub(i64 ptrtoint(i32* @g3 to i64), i64 ptrtoint(i64* @t3 to i64)), i64 4), section ".fix"
21 …trunc(i64 sub(i64 ptrtoint(i32* @g3 to i64), i64 ptrtoint(i32* @t4 to i64)) to i32), section ".fix"
26 …sub(i64 ptrtoint(i32* @g3 to i64), i64 ptrtoint(i64** @__ImageBase to i64)) to i32), section ".fix"
29 …tr (i32, i32* @g3, i32 1) to i64), i64 ptrtoint(i64** @__ImageBase to i64)) to i32), section ".fix"
40 }, section ".fix"
/llvm-project-15.0.7/llvm/test/Transforms/NewGVN/
H A Dcommute.ll47 declare i16 @llvm.smul.fix.i16(i16, i16, i32)
48 declare i16 @llvm.umul.fix.i16(i16, i16, i32)
52 ; CHECK-NEXT: [[M1:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i32 1)
53 ; CHECK-NEXT: [[M2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[Y]], i16 [[X]], i32 1)
57 %m1 = call i16 @llvm.smul.fix.i16(i16 %x, i16 %y, i32 1)
58 %m2 = call i16 @llvm.smul.fix.i16(i16 %y, i16 %x, i32 1)
65 ; CHECK-NEXT: [[M1:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i32 2)
66 ; CHECK-NEXT: [[M2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[Y]], i16 [[X]], i32 1)
70 %m1 = call i16 @llvm.umul.fix.i16(i16 %x, i16 %y, i32 2)
71 %m2 = call i16 @llvm.umul.fix.i16(i16 %y, i16 %x, i32 1)
/llvm-project-15.0.7/polly/lib/External/isl/
H A DChangeLog19 - fix error handling
26 - scheduler fix involving fixed dimensions
37 - fix coalescing bugs
71 - fix bug in coalescing treatment
79 - fix handling of nested integer divisions
88 - fix bug in simplification
137 - MinGW-w64 build fix
138 - fix simplification bug
144 - fix regression in AST generator
155 - fix some hard to trigger bugs
[all …]
/llvm-project-15.0.7/mlir/python/mlir/_mlir_libs/_mlir/
H A Dir.pyi130 # TODO: Auto-generated. Audit and fix.
216 # TODO: Auto-generated. Audit and fix.
224 # TODO: Auto-generated. Audit and fix.
234 # TODO: Auto-generated. Audit and fix.
242 # TODO: Auto-generated. Audit and fix.
252 # TODO: Auto-generated. Audit and fix.
262 # TODO: Auto-generated. Audit and fix.
272 # TODO: Auto-generated. Audit and fix.
279 # TODO: Auto-generated. Audit and fix.
323 # TODO: Auto-generated. Audit and fix.
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/mve-intrinsics/
H A Dvcvt.ll12 declare <8 x half> @llvm.arm.mve.vcvt.fix.v8f16.v8i16(i32, <8 x i16>, i32)
13 declare <4 x float> @llvm.arm.mve.vcvt.fix.v4f32.v4i32(i32, <4 x i32>, i32)
14 declare <8 x i16> @llvm.arm.mve.vcvt.fix.v8i16.v8f16(i32, <8 x half>, i32)
15 declare <4 x i32> @llvm.arm.mve.vcvt.fix.v4i32.v4f32(i32, <4 x float>, i32)
75 %0 = call <8 x half> @llvm.arm.mve.vcvt.fix.v8f16.v8i16(i32 0, <8 x i16> %a, i32 1)
85 %0 = call <8 x half> @llvm.arm.mve.vcvt.fix.v8f16.v8i16(i32 1, <8 x i16> %a, i32 2)
95 %0 = call <4 x float> @llvm.arm.mve.vcvt.fix.v4f32.v4i32(i32 0, <4 x i32> %a, i32 3)
105 %0 = call <4 x float> @llvm.arm.mve.vcvt.fix.v4f32.v4i32(i32 1, <4 x i32> %a, i32 32)
115 %0 = call <8 x i16> @llvm.arm.mve.vcvt.fix.v8i16.v8f16(i32 0, <8 x half> %a, i32 1)
125 %0 = call <8 x i16> @llvm.arm.mve.vcvt.fix.v8i16.v8f16(i32 1, <8 x half> %a, i32 2)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/GVN/
H A Dcommute.ll71 declare i16 @llvm.smul.fix.i16(i16, i16, i32)
72 declare i16 @llvm.umul.fix.i16(i16, i16, i32)
76 ; CHECK-NEXT: [[M1:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i32 1)
79 %m1 = call i16 @llvm.smul.fix.i16(i16 %x, i16 %y, i32 1)
80 %m2 = call i16 @llvm.smul.fix.i16(i16 %y, i16 %x, i32 1)
89 ; CHECK-NEXT: [[M1:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i32 2)
90 ; CHECK-NEXT: [[M2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[Y]], i16 [[X]], i32 1)
94 %m1 = call i16 @llvm.umul.fix.i16(i16 %x, i16 %y, i32 2)
95 %m2 = call i16 @llvm.umul.fix.i16(i16 %y, i16 %x, i32 1)

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