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Searched refs:destinations (Results 1 – 25 of 28) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DREADME-Thumb2.txt5 Make sure jumptable destinations are below the jumptable in order to make use
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dcombine-unmerge.mir6 # the destinations of the unmerge.
26 # the destinations of the unmerge.
50 # the destinations of the unmerge.
70 # the destinations of the unmerge.
94 # the destinations of the unmerge.
114 # the destinations of the unmerge.
135 # the destinations of the unmerge, since the types don't match.
162 # the destinations of the unmerge with a bitcast since the sizes
/llvm-project-15.0.7/bolt/test/X86/
H A Dindirect-goto.test7 # Check that all possible destinations are included as successors.
/llvm-project-15.0.7/bolt/test/X86/Inputs/
H A Djump-table-pic.s5 # One of the destinations of the jump table points past the end of the function
/llvm-project-15.0.7/llvm/test/Assembler/
H A Dcall-arg-is-callee.ll26 ; verifier prevents duplicating callbr destinations.
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dindirectbr-3.ll6 ; blocks that were the destinations of indirect branches, leaving branches to
H A Dindirectbr-2.ll8 ; The indirect branch has the two destinations as successors. The lone PHI
/llvm-project-15.0.7/lldb/examples/test/
H A Dusage-lldb-loggings3 # into individual log destinations.
/llvm-project-15.0.7/mlir/lib/AsmParser/
H A DParser.cpp503 ParseResult parseSuccessors(SmallVectorImpl<Block *> &destinations);
1197 OperationParser::parseSuccessors(SmallVectorImpl<Block *> &destinations) { in parseSuccessors() argument
1201 auto parseElt = [this, &destinations] { in parseSuccessors()
1204 destinations.push_back(dest); in parseSuccessors()
/llvm-project-15.0.7/flang/lib/Optimizer/Dialect/
H A DFIROps.cpp2720 llvm::ArrayRef<mlir::Block *> destinations, in build() argument
2742 const auto count = destinations.size(); in build()
2743 for (auto d : destinations) in build()
2773 llvm::ArrayRef<mlir::Block *> destinations, in build() argument
2789 build(builder, result, selector, compareAttrs, cmpOpers, destinations, in build()
3002 llvm::ArrayRef<mlir::Block *> destinations, in build() argument
3007 const auto count = destinations.size(); in build()
3008 for (mlir::Block *dest : destinations) in build()
/llvm-project-15.0.7/mlir/include/mlir/Dialect/LLVMIR/
H A DLLVMOpBase.td434 OpBuilder<(ins "ValueRange":$operands, "SuccessorRange":$destinations,
438 $_state.addSuccessors(destinations);
/llvm-project-15.0.7/mlir/include/mlir/Dialect/ControlFlow/IR/
H A DControlFlowOps.td127 block for a region. The two destinations of the conditional branch operation
/llvm-project-15.0.7/llvm/test/Other/
H A Dlint.ll200 ; CHECK: Undefined behavior: indirectbr with no destinations
/llvm-project-15.0.7/lld/test/MachO/
H A Darm64-thunks.s4 ## (1) address match between thunk definitions and call destinations
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/X86/
H A Dmerge-compatible-invokes-of-landingpad.ll203 ; normal destinations are not unreachable and not shared and can not be merged.
1288 ; Even though the normal destinations are unreachable,
1504 ; The normal destinations are shared, but the incoming values are incompatible.
1809 ; normal destinations are not unreachable and different but could be merged
1871 ; Even though the normal destinations are unreachable,
/llvm-project-15.0.7/flang/include/flang/Optimizer/Dialect/
H A DFIROps.td514 "llvm::ArrayRef<mlir::Block *>":$destinations,
524 const auto count = destinations.size();
525 for (auto d : destinations)
622 "llvm::ArrayRef<mlir::Block *>":$destinations,
628 "llvm::ArrayRef<mlir::Block *>":$destinations,
663 "llvm::ArrayRef<mlir::Block *>":$destinations,
/llvm-project-15.0.7/llvm/test/Transforms/LICM/
H A Dhoist-phi.ll1148 ; destinations.
1208 ; two destinations that are actually the same. We can't hoist this.
/llvm-project-15.0.7/llvm/docs/
H A DExceptionHandling.rst785 funclet nesting relationship to encode unwind destinations, and so are
839 Finally, the funclet pads' unwind destinations cannot form a cycle. This
H A DSpeculativeLoadHardening.md1009 destinations of every conditional branch. This ensures that no predicate or
/llvm-project-15.0.7/flang/lib/Optimizer/CodeGen/
H A DCodeGen.cpp2917 llvm::SmallVector<mlir::Block *> destinations; in selectMatchAndRewrite() local
2928 destinations.push_back(dest); in selectMatchAndRewrite()
2949 /*caseDestinations=*/destinations, in selectMatchAndRewrite()
/llvm-project-15.0.7/mlir/test/Transforms/
H A Dloop-fusion-3.mlir725 // not to be removed after fusion and the destinations do not write to `%arg0`.
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dcfg-stackify-eh.ll1126 ; This tests if invalidated branch destinations after fixing catch unwind
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrArithmetic.td1513 // instruction is defined to keep the high if both destinations are the same.
/llvm-project-15.0.7/llvm/test/Transforms/LoopIdiom/X86/
H A Dlogical-right-shift-until-zero.ll624 br i1 %val.shifted.iszero, label %loop, label %end ; wrong destinations
H A Dleft-shift-until-zero.ll624 br i1 %val.shifted.iszero, label %loop, label %end ; wrong destinations

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