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Searched refs:def_instructions (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNPreRAOptimizations.cpp93 for (MachineInstr &I : MRI->def_instructions(Reg)) { in processReg()
121 for (auto &Def : MRI->def_instructions(SrcReg)) { in processReg()
H A DSIFixSGPRCopies.cpp416 for (auto &MI : MRI.def_instructions(Reg)) { in hoistAndMergeSGPRInits()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DPHIEliminationUtils.cpp41 for (MachineInstr &RI : MRI.def_instructions(SrcReg)) in findPHICopyInsertPoint()
H A DMachineStableHash.cpp69 for (auto &Def : MRI.def_instructions(MO.getReg())) in stableHashValue()
H A DRegAllocFast.cpp363 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveOut()
411 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn()
736 for (const MachineInstr &MI : MRI->def_instructions(VirtReg)) { in traceCopies()
H A DPHIElimination.cpp252 for (MachineInstr &DI : MRI.def_instructions(VirtReg)) in isImplicitlyDefined()
H A DTwoAddressInstructionPass.cpp207 for (MachineInstr &DefMI : MRI->def_instructions(Reg)) { in getSingleDef()
973 for (MachineInstr &DefMI : MRI->def_instructions(Reg)) { in isDefTooClose()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86TileConfig.cpp160 for (auto &DefMI : MRI.def_instructions(R)) { in INITIALIZE_PASS_DEPENDENCY()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFixIrreducibleControlFlow.cpp495 for (const auto &Def : MRI.def_instructions(Reg)) in hasArgumentDef()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp174 for (MachineInstr &DefMI : MRI->def_instructions(VirtReg)) in getRegAllocationHints()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h413 def_instructions(Register Reg) const { in def_instructions() function