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Searched refs:ctlz (Results 1 – 25 of 199) sorted by relevance

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/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Dctlz.ll12 %ctlz = call i64 @llvm.ctlz.i64(i64 %a)
13 ret i64 %ctlz
22 %ctlz = call i32 @llvm.ctlz.i32(i32 %a)
23 ret i32 %ctlz
32 %ctlz = call i16 @llvm.ctlz.i16(i16 %a)
33 ret i16 %ctlz
42 %ctlz = call i8 @llvm.ctlz.i8(i8 %a)
43 ret i8 %ctlz
59 %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
119 %ctlz = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %a, i1 false)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dctlz.ll27 %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 0)
28 ret i64 %ctlz
40 %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 1)
41 ret i64 %ctlz
53 %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
66 %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 1)
79 %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 0)
92 %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 1)
105 %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 0)
106 ret i8 %ctlz
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dctlz.ll18 declare i64 @llvm.ctlz.i64(i64, i1)
19 declare i32 @llvm.ctlz.i32(i32, i1)
20 declare i16 @llvm.ctlz.i16(i16, i1)
21 declare i8 @llvm.ctlz.i8(i8, i1)
39 %ctlz0 = call i64 @llvm.ctlz.i64(i64 %ld0, i1 0)
40 %ctlz1 = call i64 @llvm.ctlz.i64(i64 %ld1, i1 0)
87 %ctlz0 = call i64 @llvm.ctlz.i64(i64 %ld0, i1 0)
88 %ctlz1 = call i64 @llvm.ctlz.i64(i64 %ld1, i1 0)
89 %ctlz2 = call i64 @llvm.ctlz.i64(i64 %ld2, i1 0)
90 %ctlz3 = call i64 @llvm.ctlz.i64(i64 %ld3, i1 0)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-vclz.ll9 %vclz.i = tail call <8 x i8> @llvm.ctlz.v8i8(<8 x i8> %a, i1 false) nounwind
18 %vclz.i = tail call <8 x i8> @llvm.ctlz.v8i8(<8 x i8> %a, i1 false) nounwind
27 %vclz1.i = tail call <4 x i16> @llvm.ctlz.v4i16(<4 x i16> %a, i1 false) nounwind
140 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone
142 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone
144 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1) nounwind readnone
146 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) nounwind readnone
148 declare <1 x i64> @llvm.ctlz.v1i64(<1 x i64>, i1) nounwind readnone
150 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
152 declare <4 x i16> @llvm.ctlz.v4i16(<4 x i16>, i1) nounwind readnone
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/VE/Scalar/
H A Dctlz.ll3 declare i128 @llvm.ctlz.i128(i128, i1)
4 declare i64 @llvm.ctlz.i64(i64, i1)
5 declare i32 @llvm.ctlz.i32(i32, i1)
6 declare i16 @llvm.ctlz.i16(i16, i1)
7 declare i8 @llvm.ctlz.i8(i8, i1)
19 %r = tail call i128 @llvm.ctlz.i128(i128 %p, i1 true)
28 %r = tail call i64 @llvm.ctlz.i64(i64 %p, i1 true)
40 %r = tail call i32 @llvm.ctlz.i32(i32 %p, i1 true)
51 %r = tail call i32 @llvm.ctlz.i32(i32 %p, i1 true)
89 %r = tail call i8 @llvm.ctlz.i8(i8 %p, i1 true)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dvec-ctlz-01.ll5 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %src, i1 %is_zero_undef)
6 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %src, i1 %is_zero_undef)
7 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %src, i1 %is_zero_undef)
8 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %src, i1 %is_zero_undef)
15 %res = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
24 %res = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
33 %res = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
42 %res = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
51 %res = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
60 %res = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
[all …]
H A Dscalar-ctlz.ll5 declare i64 @llvm.ctlz.i64(i64, i1)
6 declare i32 @llvm.ctlz.i32(i32, i1)
7 declare i16 @llvm.ctlz.i16(i16, i1)
8 declare i8 @llvm.ctlz.i8(i8, i1)
15 %1 = tail call i64 @llvm.ctlz.i64(i64 %arg, i1 false)
25 %1 = tail call i64 @llvm.ctlz.i64(i64 %arg, i1 true)
37 %1 = tail call i32 @llvm.ctlz.i32(i32 %arg, i1 false)
49 %1 = tail call i32 @llvm.ctlz.i32(i32 %arg, i1 true)
75 %1 = tail call i16 @llvm.ctlz.i16(i16 %arg, i1 true)
88 %1 = tail call i8 @llvm.ctlz.i8(i8 %arg, i1 false)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dctlz.ll6 declare i16 @llvm.ctlz.i16(i16, i1) readnone
7 declare i32 @llvm.ctlz.i32(i32, i1) readnone
8 declare i64 @llvm.ctlz.i64(i64, i1) readnone
19 %val = call i32 @llvm.ctlz.i32(i32 %a, i1 false) readnone
28 %val = call i32 @llvm.ctlz.i32(i32 %a, i1 true) readnone
41 %val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
51 %val = call i64 @llvm.ctlz.i64(i64 %a, i1 true) readnone
64 %val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
74 %val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
91 %val = call i16 @llvm.ctlz.i16(i16 %a, i1 false) readnone
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dzext-ctlz-trunc-to-ctlz-add.ll4 declare i3 @llvm.ctlz.i3 (i3 , i1)
5 declare i32 @llvm.ctlz.i32 (i32, i1)
6 declare i34 @llvm.ctlz.i34 (i34, i1)
7 declare <2 x i33> @llvm.ctlz.v2i33 (<2 x i33>, i1)
8 declare <2 x i32> @llvm.ctlz.v2i32 (<2 x i32>, i1)
21 %p = call i32 @llvm.ctlz.i32(i32 %z, i1 false)
35 %p = call <2 x i33> @llvm.ctlz.v2i33(<2 x i33> %z, i1 true)
54 ; Multiple uses of ctlz for which the opt is disabled
65 %p = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %z, i1 false)
98 %p = call i32 @llvm.ctlz.i32(i32 %z, i1 false)
[all …]
H A Dintrinsics.ll169 define i8 @ctlz(i8 %a) {
170 ; CHECK-LABEL: @ctlz(
290 %ctlz = call i32 @llvm.ctlz.i32(i32 0, i1 true)
291 ret i32 %ctlz
299 ret <2 x i32> %ctlz
309 %ctlz = tail call i32 @llvm.ctlz.i32(i32 %or, i1 false)
310 ret i32 %ctlz
320 %ctlz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %or, i1 false)
321 ret <2 x i32> %ctlz
368 %ctlz = call i32 @llvm.ctlz.i32(i32 %Value, i1 true)
[all …]
H A Dselect-cmp-cttz-ctlz.ll5 ; a cttz/ctlz followed by a icmp + select into a single cttz/ctlz with
13 %ct = tail call i16 @llvm.ctlz.i16(i16 %x, i1 true)
24 %ct = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
35 %ct = tail call i64 @llvm.ctlz.i64(i64 %x, i1 true)
46 %ct = tail call i16 @llvm.ctlz.i16(i16 %x, i1 true)
57 %ct = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
68 %ct = tail call i64 @llvm.ctlz.i64(i64 %x, i1 true)
536 declare i16 @llvm.ctlz.i16(i16, i1)
537 declare i32 @llvm.ctlz.i32(i32, i1)
538 declare i64 @llvm.ctlz.i64(i64, i1)
[all …]
H A Dctlz-cttz-bitreverse.ll10 %b = tail call i32 @llvm.ctlz.i32(i32 %a, i1 true)
20 %b = tail call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
30 %b = tail call i32 @llvm.ctlz.i32(i32 %a, i1 false)
36 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), !range !0
46 ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[X:%.*]], i1 true)
56 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
66 declare i32 @llvm.ctlz.i32(i32, i1)
68 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
H A Dknown-non-zero.ll6 declare i64 @llvm.ctlz.i64(i64, i1)
43 ; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), [[RNG0]]
55 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
153 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
176 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
199 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
222 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
245 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
268 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
291 %ctz = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
[all …]
H A Dselect-ctlz-to-cttz.ll6 declare i32 @llvm.ctlz.i32(i32, i1 immarg)
8 declare i64 @llvm.ctlz.i64(i64, i1 immarg)
10 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
24 %lz = tail call i32 @llvm.ctlz.i32(i32 %and, i1 true)
38 %lz = tail call i32 @llvm.ctlz.i32(i32 %and, i1 false)
71 %lz = tail call i32 @llvm.ctlz.i32(i32 %and, i1 true)
86 %lz = tail call i32 @llvm.ctlz.i32(i32 %and, i1 true)
102 %lz = tail call i32 @llvm.ctlz.i32(i32 %and, i1 true)
117 %lz = tail call i64 @llvm.ctlz.i64(i64 %and, i1 true)
138 %lz = tail call i32 @llvm.ctlz.i32(i32 %and, i1 true)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvcnt.ll27 %tmp2 = call <8 x i8> @llvm.ctlz.v8i8(<8 x i8> %tmp1, i1 0)
35 %tmp2 = call <4 x i16> @llvm.ctlz.v4i16(<4 x i16> %tmp1, i1 0)
43 %tmp2 = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %tmp1, i1 0)
50 %tmp2 = call <1 x i64> @llvm.ctlz.v1i64(<1 x i64> %tmp1, i1 0)
58 %tmp2 = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %tmp1, i1 0)
66 %tmp2 = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %tmp1, i1 0)
74 %tmp2 = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %tmp1, i1 0)
81 %tmp2 = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %tmp1, i1 0)
89 %tmp2 = call <8 x i8> @llvm.ctlz.v8i8(<8 x i8> %tmp1, i1 1)
97 %tmp2 = call <4 x i16> @llvm.ctlz.v4i16(<4 x i16> %tmp1, i1 1)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dlzcnt-cmp.ll36 %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 0)
37 %lshr = lshr i64 %ctlz, 6
85 %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 -1)
86 %lshr = lshr i64 %ctlz, 6
119 %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 0)
120 %lshr = lshr i64 %ctlz, 6
166 %ctlz = call i64 @llvm.ctlz.i64(i64 %in, i1 -1)
167 %lshr = lshr i64 %ctlz, 6
203 %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %in, i1 0)
239 %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %in, i1 0)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dmve-ctlz.ll30 %0 = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %src, i1 0)
40 %0 = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %src, i1 0)
50 %0 = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %src, i1 0)
60 %0 = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %src, i1 0)
89 %0 = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %src, i1 1)
99 %0 = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %src, i1 1)
109 %0 = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %src, i1 1)
124 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
125 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1)
126 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dvec_clz.ll8 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>) nounwind readnone
9 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>) nounwind readnone
10 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>) nounwind readnone
11 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>) nounwind readnone
23 %vcnt = tail call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x)
37 %vcnt = tail call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x)
51 %vcnt = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x)
65 %vcnt = tail call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x)
69 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg)
81 %v2 = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %v1, i1 true)
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/NVPTX/
H A Dnon-vectorizable-intrinsic.ll16 ; CHECK-NEXT: [[CALL_I:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP0]], i1 false)
19 ; CHECK-NEXT: [[CALL_I4:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP1]], i1 false)
25 %call.i = call i8 @llvm.ctlz.i8(i8 %0, i1 false)
28 %call.i4 = call i8 @llvm.ctlz.i8(i8 %1, i1 false)
38 ; CHECK-NEXT: [[CALL_I:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP0]], i1 false)
39 ; CHECK-NEXT: [[CALL_I4:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP1]], i1 false)
47 %call.i = call i8 @llvm.ctlz.i8(i8 %0, i1 false)
48 %call.i4 = call i8 @llvm.ctlz.i8(i8 %1, i1 false)
54 declare i8 @llvm.ctlz.i8(i8, i1) #3
H A Dnon-vectorizable-intrinsic-inseltpoison.ll16 ; CHECK-NEXT: [[CALL_I:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP0]], i1 false)
19 ; CHECK-NEXT: [[CALL_I4:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP1]], i1 false)
25 %call.i = call i8 @llvm.ctlz.i8(i8 %0, i1 false)
28 %call.i4 = call i8 @llvm.ctlz.i8(i8 %1, i1 false)
38 ; CHECK-NEXT: [[CALL_I:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP0]], i1 false)
39 ; CHECK-NEXT: [[CALL_I4:%.*]] = call i8 @llvm.ctlz.i8(i8 [[TMP1]], i1 false)
47 %call.i = call i8 @llvm.ctlz.i8(i8 %0, i1 false)
48 %call.i4 = call i8 @llvm.ctlz.i8(i8 %1, i1 false)
54 declare i8 @llvm.ctlz.i8(i8, i1) #3
/llvm-project-15.0.7/llvm/test/Feature/
H A Dintrinsics.ll27 declare i8 @llvm.ctlz.i8(i8, i1)
29 declare i16 @llvm.ctlz.i16(i16, i1)
31 declare i32 @llvm.ctlz.i32(i32, i1)
33 declare i64 @llvm.ctlz.i64(i64, i1)
50 call i8 @llvm.ctlz.i8( i8 14, i1 true ) ; <i32>:9 [#uses=0]
51 call i16 @llvm.ctlz.i16( i16 15, i1 true ) ; <i32>:10 [#uses=0]
52 call i32 @llvm.ctlz.i32( i32 16, i1 true ) ; <i32>:11 [#uses=0]
53 call i64 @llvm.ctlz.i64( i64 17, i1 true ) ; <i32>:12 [#uses=0]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A D2010-11-09-CountLeading.ll6 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)
10 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
15 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)
23 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)
31 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A Dllvm-ct-intrinsics.ll24 declare i64 @llvm.ctlz.i64(i64, i1)
26 declare i32 @llvm.ctlz.i32(i32, i1)
28 declare i16 @llvm.ctlz.i16(i16, i1)
30 declare i8 @llvm.ctlz.i8(i8, i1)
33 %a = call i8 @llvm.ctlz.i8( i8 %A, i1 true ) ; <i8> [#uses=1]
34 %b = call i16 @llvm.ctlz.i16( i16 %B, i1 true ) ; <i16> [#uses=1]
35 %c = call i32 @llvm.ctlz.i32( i32 %C, i1 true ) ; <i32> [#uses=1]
36 %d = call i64 @llvm.ctlz.i64( i64 %D, i1 true ) ; <i64> [#uses=1]
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/X86/
H A Dcttz-ctlz.ll48 define i64 @ctlz(i64 %A) {
49 ; SLOW-LABEL: @ctlz(
55 ; SLOW-NEXT: [[Z:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A_FR]], i1 true)
61 ; FAST_TZ-LABEL: @ctlz(
67 ; FAST_TZ-NEXT: [[Z:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A_FR]], i1 true)
73 ; FAST_LZ-LABEL: @ctlz(
75 ; FAST_LZ-NEXT: [[Z:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A:%.*]], i1 false)
79 %z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
84 declare i64 @llvm.ctlz.i64(i64, i1)
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dcountbits-basic.ll6 %1 = call i32 @llvm.ctlz.i32(i32 %p, i1 false)
13 %1 = call i64 @llvm.ctlz.i64(i64 %p, i1 false)
22 %2 = call i32 @llvm.ctlz.i32(i32 %1, i1 false)
30 %2 = call i64 @llvm.ctlz.i64(i64 %1, i1 false)
69 declare i32 @llvm.ctlz.i32(i32, i1)
70 declare i64 @llvm.ctlz.i64(i64, i1)

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