| /llvm-project-15.0.7/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 559 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF() 565 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF() 580 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6() 594 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATI() 633 MI.addOperand(MCOperand::createImm(Imm)); in DecodeAddiGroupBranch() 667 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP35GroupBranchMMR6() 706 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDaddiGroupBranch() 740 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP37GroupBranchMMR6() 779 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP65GroupBranchMMR6() 818 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP75GroupBranchMMR6() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 756 TmpInst.addOperand(MCOperand::createImm( in ProcessInstruction() 800 TmpInst.addOperand(MCOperand::createImm(L)); in ProcessInstruction() 859 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() 860 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() 889 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() 904 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() 917 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() 929 TmpInst.addOperand(MCOperand::createImm(N)); in ProcessInstruction() 930 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() 943 TmpInst.addOperand(MCOperand::createImm(N)); in ProcessInstruction() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget() 76 Inst.addOperand(MCOperand::createImm(Offset)); in decodeDirectBrTarget() 204 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 213 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 222 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand() 266 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands() 305 Inst.addOperand(MCOperand::createImm(Disp)); in decodeMemRIHashOperands() 336 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34PCRelOperands() 366 Inst.addOperand(MCOperand::createImm(Disp << 3)); in decodeSPE8Operands() 382 Inst.addOperand(MCOperand::createImm(Disp << 2)); in decodeSPE4Operands() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 193 Inst.addOperand(MCOperand::createImm(Offset)); in DecodeSymbolicOperandOff() 212 Inst.addOperand(MCOperand::createImm( in DecodeSignedOperand() 241 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeStLImmInstruction() 242 Inst.addOperand(MCOperand::createImm(0)); in DecodeStLImmInstruction() 259 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeLdLImmInstruction() 260 Inst.addOperand(MCOperand::createImm(0)); in DecodeLdLImmInstruction() 294 Inst.addOperand(MCOperand::createImm(Value)); in DecodeMoveHRegInstruction() 316 Inst.addOperand(MCOperand::createImm(U6Field)); in DecodeCCRU6Instruction() 318 Inst.addOperand(MCOperand::createImm(CCField)); in DecodeCCRU6Instruction() 329 Inst.addOperand(MCOperand::createImm(U6)); in DecodeSOPwithRU6() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 97 MCOperand czero = MCOperand::createImm(0); in emitBSIC() 108 MCOperand CZero = MCOperand::createImm(0); in emitLEAzzi() 120 MCOperand CZero = MCOperand::createImm(0); in emitLEASLzzi() 132 MCOperand CZero = MCOperand::createImm(0); in emitLEAzii() 175 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo() 210 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETGOTAndEmitMCInsts() 214 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts() 258 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETFunPLTAndEmitMCInsts() 262 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETFunPLTAndEmitMCInsts() 306 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETTLSAddrAndEmitMCInsts() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 173 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 181 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 266 Inst.addOperand(MCOperand::createImm(Value)); in decodePCDBLOperand() 307 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand() 328 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand() 352 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand() 353 Inst.addOperand(MCOperand::createImm(Length + 1)); in decodeBDLAddr12Len4Operand() 364 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len8Operand() 365 Inst.addOperand(MCOperand::createImm(Length + 1)); in decodeBDLAddr12Len8Operand() 376 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDRAddr12Operand() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 776 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMRSSystemRegister() 786 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMSRSystemRegister() 809 Inst.addOperand(MCOperand::createImm(1)); in DecodeFMOVLaneInstruction() 982 Inst.addOperand(MCOperand::createImm(imm)); in DecodeMoveImmInstruction() 1578 Inst.addOperand(MCOperand::createImm(imm)); in DecodeLogicalImmInstruction() 1595 Inst.addOperand(MCOperand::createImm(imm)); in DecodeModImmInstruction() 1633 Inst.addOperand(MCOperand::createImm(imm)); in DecodeModImmTiedInstruction() 1727 Inst.addOperand(MCOperand::createImm(crm)); in DecodeSystemPStateInstruction() 1752 Inst.addOperand(MCOperand::createImm(bit)); in DecodeTestAndBranch() 1800 Inst.addOperand(MCOperand::createImm(imm)); in DecodeSVELogicalImmInstruction() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1642 Inst.addOperand(MCOperand::createImm(Val)); in DecodePredicateOperand() 1693 Inst.addOperand(MCOperand::createImm(Op)); in DecodeSORegImmOperand() 1948 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction() 2386 Inst.addOperand(MCOperand::createImm(U)); in DecodeAddrMode3Instruction() 2809 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeSETPANInstruction() 2828 Inst.addOperand(MCOperand::createImm(imm)); in DecodeAddrModeImm12Operand() 3682 Inst.addOperand(MCOperand::createImm(0)); in DecodeVLD3DupInstruction() 3817 Inst.addOperand(MCOperand::createImm(0)); in DecodeMVEModImmInstruction() 3843 Inst.addOperand(MCOperand::createImm(Qd)); in DecodeMVEVADCInstruction() 6155 Inst.addOperand(MCOperand::createImm(0)); in DecodeNEONComplexLane64Instruction() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 138 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr() 154 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA() 162 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT() 163 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT() 172 Inst.addOperand(MCOperand::createImm(Field << 1)); in decodeCallTarget() 233 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK() 263 Inst.addOperand(MCOperand::createImm(Insn & 0x3f)); in decodeMemri() 282 Inst.addOperand(MCOperand::createImm(Offset)); in decodeLoadStore() 286 Inst.addOperand(MCOperand::createImm(Offset)); in decodeLoadStore() 367 Inst.addOperand(MCOperand::createImm(1)); in decodeLoadStore()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust() 182 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue() 208 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue() 225 MI.addOperand(MCOperand::createImm(Insn)); in decodeBranch() 233 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm() 243 Inst.addOperand(MCOperand::createImm(Val)); in decodePredicateOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVAsmPrinter.cpp | 258 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang))); in outputDebugSourceAndStrings() 260 MCOperand::createImm(static_cast<unsigned>(MAI->SrcLangVersion))); in outputDebugSourceAndStrings() 280 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr))); in outputOpMemoryModel() 281 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem))); in outputOpMemoryModel() 368 Inst.addOperand(MCOperand::createImm(Const->getZExtValue())); in addOpsFromMDNode() 383 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM))); in outputExecutionModeFromMDNode() 418 Inst.addOperand(MCOperand::createImm(EM)); in outputExecutionMode() 420 Inst.addOperand(MCOperand::createImm(TypeCode)); in outputExecutionMode() 454 Inst.addOperand(MCOperand::createImm(Dec)); in outputAnnotations()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 394 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 438 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegImmOperands() 446 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegRegOperands() 603 static std::unique_ptr<LanaiOperand> createImm(const MCExpr *Value, in createImm() function 798 return LanaiOperand::createImm(Res, Start, End); in parseIdentifier() 814 return LanaiOperand::createImm(ExprVal, Start, End); in parseImmediate() 981 Offset = LanaiOperand::createImm(OffsetConstExpr, Start, End); in parseMemoryOperand() 1082 Operands->push_back(LanaiOperand::createImm( in splitMnemonic() 1111 Operands->push_back(LanaiOperand::createImm( in splitMnemonic() 1204 LanaiOperand::createImm( in ParseInstruction() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 89 return addOperand(Inst, MCOperand::createImm(Imm)); in decodeSoppBrTarget() 101 return addOperand(Inst, MCOperand::createImm(Offset)); in decodeSMEMOffset() 603 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction() 633 MI.insert(TFEIter, MCOperand::createImm(0)); in getInstruction() 644 MI.insert(SWZIter, MCOperand::createImm(0)); in getInstruction() 859 addOperand(MI, MCOperand::createImm(1)); in convertMIMGInst() 1012 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertVOPCDPPInst() 1017 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertVOPCDPPInst() 1279 return MCOperand::createImm(Literal); in decodeMandatoryLiteralConstant() 1294 return MCOperand::createImm(Literal); in decodeLiteralConstant() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 231 Inst.addOperand(MCOperand::createImm(Imm << S)); in decodeUImmOperand() 240 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeOImmOperand() 248 Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2)); in decodeLRW16Imm8() 251 Inst.addOperand(MCOperand::createImm(V << 2)); in decodeLRW16Imm8() 263 Inst.addOperand(MCOperand::createImm(16)); in decodeJMPIXImmOperand() 265 Inst.addOperand(MCOperand::createImm(24)); in decodeJMPIXImmOperand() 267 Inst.addOperand(MCOperand::createImm(32)); in decodeJMPIXImmOperand() 269 Inst.addOperand(MCOperand::createImm(40)); in decodeJMPIXImmOperand() 364 Inst.addOperand(MCOperand::createImm(Log2(Imm))); in decodeImmShiftOpValue() 374 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S)); in decodeSImmOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 38 NopInst.addOperand(MCOperand::createImm(0)); in getNop() 39 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop() 45 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 331 MI.addOperand(MCOperand::createImm(0)); in DecodeASX() 340 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX() 344 MI.addOperand(MCOperand::createImm(simm32)); in DecodeASX() 362 MI.addOperand(MCOperand::createImm(0)); in DecodeAS() 366 MI.addOperand(MCOperand::createImm(simm32)); in DecodeAS() 491 MI.addOperand(MCOperand::createImm(sy)); in DecodeCAS() 493 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS() 536 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM7() 543 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM32() 593 MI.addOperand(MCOperand::createImm(VEValToRD(cf))); in DecodeRDOperand() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVMCInstLower.cpp | 106 MCOp = MCOperand::createImm(MO.getImm()); in lowerRISCVMachineOperandToMCOperand() 199 MCOp = MCOperand::createImm(MO.getImm()); in lowerRISCVVMachineInstrToMCInst() 242 OutMI.addOperand(MCOperand::createImm( in lowerRISCVMachineInstrToMCInst() 249 MCOperand::createImm(RISCVSysReg::lookupSysRegByName("VL")->Encoding)); in lowerRISCVMachineInstrToMCInst()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 398 MI.addOperand(MCOperand::createImm(simm13)); in DecodeMem() 406 MI.addOperand(MCOperand::createImm(asi)); in DecodeMem() 521 MI.addOperand(MCOperand::createImm(tgt)); in DecodeCall() 528 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM13() 557 MI.addOperand(MCOperand::createImm(simm13)); in DecodeJMPL() 585 MI.addOperand(MCOperand::createImm(simm13)); in DecodeReturn() 621 MI.addOperand(MCOperand::createImm(simm13)); in DecodeSWAP() 629 MI.addOperand(MCOperand::createImm(asi)); in DecodeSWAP() 654 MI.addOperand(MCOperand::createImm(imm7)); in DecodeTRAP() 662 MI.addOperand(MCOperand::createImm(cc)); in DecodeTRAP()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/Disassembler/ |
| H A D | WebAssemblyDisassembler.cpp | 104 MI.addOperand(MCOperand::createImm(Val)); in parseLEBImmediate() 119 MI.addOperand(MCOperand::createImm(static_cast<int64_t>(Val))); in parseImmediate() 229 MCOperand::createImm(int64_t(WebAssembly::BlockType::Invalid))); in getInstruction() 231 MI.addOperand(MCOperand::createImm(Val & 0x7f)); in getInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2466 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 2561 Inst.addOperand(MCOperand::createImm( in addRegShiftedRegOperands() 2572 Inst.addOperand(MCOperand::createImm( in addRegShiftedImmOperands() 2632 Inst.addOperand(MCOperand::createImm(Enc)); in addModImmNotOperands() 2639 Inst.addOperand(MCOperand::createImm(Enc)); in addModImmNegOperands() 2646 Inst.addOperand(MCOperand::createImm(Val)); in addThumbModImmNeg8_255Operands() 2653 Inst.addOperand(MCOperand::createImm(Val)); in addThumbModImmNeg1_7Operands() 2688 Inst.addOperand(MCOperand::createImm(Val)); in addFPImmOperands() 2899 Inst.addOperand(MCOperand::createImm(Val)); in addAdrLabelOperands() 2992 Inst.addOperand(MCOperand::createImm(Val)); in addAM2OffsetImmOperands() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 124 MI.addOperand(MCOperand::createImm(Imm)); in DecodeCGImm() 138 MI.addOperand(MCOperand::createImm((int16_t)Imm)); in DecodeMemOperand() 347 MI.addOperand(MCOperand::createImm(SignExtend32(Offset, 10))); in getInstructionCJ() 353 MI.addOperand(MCOperand::createImm(getCondCode(Cond))); in getInstructionCJ()
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| /llvm-project-15.0.7/bolt/lib/Target/X86/ |
| H A D | X86MCPlusBuilder.cpp | 1251 Inst.addOperand(MCOperand::createImm(SrcImm)); in changeToPushOrPop() 1607 MCOperand ImmOp = MCOperand::createImm(ImmVal); in replaceMemOperandWithImm() 1927 MCOperand::createImm(CC)); in convertMoveToConditionalMove() 2391 Inst.addOperand(MCOperand::createImm(Size)); in createStackPointerIncrement() 2412 Inst.addOperand(MCOperand::createImm(Size)); in createStackPointerDecrement() 2461 Inst.addOperand(MCOperand::createImm(Scale)); in createLoad() 2476 Inst.addOperand(MCOperand::createImm(Imm)); in createLoadImmediate() 2835 Inst.addOperand(MCOperand::createImm(Imm)); in replaceRegWithImm() 3146 Inst.addOperand(MCOperand::createImm(Value)); in createAddRegImm() 3168 Inst.addOperand(MCOperand::createImm(0)); in createClearRegWithNoEFlagsUpdate() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 108 Inst.addOperand(MCOperand::createImm(Imm + P)); in decodeUImmOperand() 119 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S)); in decodeSImmOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 286 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 306 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 327 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm << 1))); in decodeSImmOperandAndLsl1() 338 Inst.addOperand(MCOperand::createImm(Imm)); in decodeCLUIImmOperand() 348 Inst.addOperand(MCOperand::createImm(Imm)); in decodeFRMArg()
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| /llvm-project-15.0.7/bolt/lib/Target/AArch64/ |
| H A D | AArch64MCPlusBuilder.cpp | 863 Inst.addOperand(MCOperand::createImm(1)); in createTrap() 895 Inst.addOperand(MCOperand::createImm(0)); in createNoop() 968 Inst.addOperand(MCOperand::createImm(0x30)); in createLongJmp() 978 Inst.addOperand(MCOperand::createImm(0x20)); in createLongJmp() 988 Inst.addOperand(MCOperand::createImm(0x10)); in createLongJmp() 998 Inst.addOperand(MCOperand::createImm(0)); in createLongJmp() 1125 Insts[0].addOperand(MCOperand::createImm(0)); in materializeAddress() 1132 Insts[1].addOperand(MCOperand::createImm(0)); in materializeAddress() 1133 Insts[1].addOperand(MCOperand::createImm(0)); in materializeAddress()
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