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Searched refs:computeInstrLatency (Results 1 – 17 of 17) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetSchedule.cpp255 TargetSchedModel::computeInstrLatency(const MCSchedClassDesc &SCDesc) const { in computeInstrLatency() function in TargetSchedModel
256 return capLatency(MCSchedModel::computeInstrLatency(*STI, SCDesc)); in computeInstrLatency()
259 unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const { in computeInstrLatency() function in TargetSchedModel
262 return capLatency(SchedModel.computeInstrLatency(*STI, SCIdx)); in computeInstrLatency()
265 unsigned TargetSchedModel::computeInstrLatency(const MCInst &Inst) const { in computeInstrLatency() function in TargetSchedModel
267 return capLatency(SchedModel.computeInstrLatency(*STI, *TII, Inst)); in computeInstrLatency()
268 return computeInstrLatency(Inst.getOpcode()); in computeInstrLatency()
272 TargetSchedModel::computeInstrLatency(const MachineInstr *MI, in computeInstrLatency() function in TargetSchedModel
283 return computeInstrLatency(*SCDesc); in computeInstrLatency()
306 return computeInstrLatency(DefMI); in computeOutputLatency()
H A DMachineCombiner.cpp294 LatencyOp = TSchedModel.computeInstrLatency(NewRoot); in getLatency()
343 NewRootLatency += TSchedModel.computeInstrLatency(InsInstrs[i]); in getLatenciesForInstrSequences()
348 RootLatency += TSchedModel.computeInstrLatency(I); in getLatenciesForInstrSequences()
H A DEarlyIfConversion.cpp1135 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1149 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1155 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
H A DIfConversion.cpp1123 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions()
2195 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock()
H A DScheduleDAGInstrs.cpp575 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h46 unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;
188 unsigned computeInstrLatency(const MachineInstr *MI,
190 unsigned computeInstrLatency(const MCInst &Inst) const;
191 unsigned computeInstrLatency(unsigned Opcode) const;
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCSchedule.cpp40 int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, in computeInstrLatency() function in MCSchedModel
56 int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, in computeInstrLatency() function in MCSchedModel
62 return MCSchedModel::computeInstrLatency(STI, SCDesc); in computeInstrLatency()
67 int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, in computeInstrLatency() function in MCSchedModel
82 return MCSchedModel::computeInstrLatency(STI, *SCDesc); in computeInstrLatency()
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCSchedule.h354 static int computeInstrLatency(const MCSubtargetInfo &STI,
357 int computeInstrLatency(const MCSubtargetInfo &STI, unsigned SClass) const;
358 int computeInstrLatency(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp1895 std::max(HazardDefLatency, TSchedModel.computeInstrLatency(&MI)); in checkMAIHazards908()
1972 std::max(HazardDefLatency, TSchedModel.computeInstrLatency(&MI)); in checkMAIHazards908()
2095 TSchedModel.computeInstrLatency(MI1) == 2) in checkMAIHazards90A()
2114 switch (TSchedModel.computeInstrLatency(MI1)) { in checkMAIHazards90A()
2164 switch (TSchedModel.computeInstrLatency(MI1)) { in checkMAIHazards90A()
2344 unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()
2445 switch (TSchedModel.computeInstrLatency(MFMA)) { in checkMAIVALUHazards()
2511 unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()
2550 return W < (int)TSchedModel.computeInstrLatency(MAI); in ShouldPreferAnother()
H A DAMDGPUSubtarget.cpp919 unsigned Lat = TSchedModel->computeInstrLatency(&MAI) - 1; in apply()
H A DSIInstrInfo.cpp8225 Lat = std::max(Lat, SchedModel.computeInstrLatency(&*I)); in getInstrLatency()
8230 return SchedModel.computeInstrLatency(&MI); in getInstrLatency()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86PadShortFunction.cpp207 CyclesToEnd += TSM.computeInstrLatency(&MI); in cyclesUntilReturn()
H A DX86CmovConversion.cpp475 unsigned Latency = TSchedModel.computeInstrLatency(&MI); in checkForProfitableCmovCandidates()
H A DX86FixupLEAs.cpp326 InstrDistance += TSM.computeInstrLatency(&*CurInst); in searchBackwards()
/llvm-project-15.0.7/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp136 IIVDEntry.Latency = MCSchedModel::computeInstrLatency(STI, SCDesc); in collectData()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SIMDInstrOpt.cpp254 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode()); in shouldReplaceInst()
256 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
/llvm-project-15.0.7/llvm/lib/MCA/
H A DInstrBuilder.cpp260 int Latency = MCSchedModel::computeInstrLatency(STI, SCDesc); in computeMaxLatency()