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/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/
H A Dseparation_class3.c7 for (int c6 = 3; c6 <= 5; c6 += 1) variable
8 S_0(7, c6);
11 for (int c6 = -2 * c0 + c4 + 4; c6 <= 2 * c0 - c4 + 4; c6 += 1) variable
12 S_0(c4, c6);
16 for (int c6 = -2 * c0 + c4 + 8; c6 <= 8; c6 += 1) variable
17 S_0(c4, c6);
21 for (int c6 = 2 * c0 + 4 * c2 - c4 + 1; c6 <= -2 * c0 + 4 * c2 + c4 + 3; c6 += 1) variable
22 S_0(c4, c6);
28 for (int c6 = 4 * c2 + 1; c6 <= 4 * c2 + 3; c6 += 1) variable
29 S_0(0, c6);
H A Dseparate2.c3 for (int c6 = max(0, 2 * (length % 16) + 2 * c5 - 62); c6 <= 30; c6 += 1) { variable
4 …c6 >= 2 * (length % 16) + 2 && c6 + 62 >= 2 * (length % 16) + 2 * c5 && 2 * (length % 16) >= c6 + …
5 S_3(c0, 0, (c6 / 2) - (length % 16) + length);
6 if (length <= 15 && length >= c5 + 1 && c6 >= 1 && length >= c6)
7 S_0(c0, c5, c6 - 1);
H A Dshift2.c6 for (int c6 = max(0, -c3 + 1); c6 <= min(31, length - c3); c6 += 1) variable
7 S_0(c0, 0, c3 + c6 - 1);
9 for (int c6 = 0; c6 <= min(31, length - c3); c6 += 1) variable
10 S_0(c0, c2 + c5, c3 + c6 - 1);
12 for (int c6 = max(0, -c3 + 1); c6 <= min(length - c3, 2 * c2 - c3 + 2 * c5 - 1); c6 += 1) variable
13 S_0(c0, c2 + c5, c3 + c6 - 1);
17 for (int c6 = 2 * c2 - c3 + 2 * c5 + 1; c6 <= min(31, length - c3); c6 += 1) variable
18 S_0(c0, c2 + c5, c3 + c6 - 1);
21 for (int c6 = max(0, -c3 + 1); c6 <= min(31, length - c3); c6 += 1) variable
22 S_0(c0, c2 + c5, c3 + c6 - 1);
/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/omega/
H A Dlefur04-0.c6 …c6 = max(max(max(max(max(-200 * c1 + 400 * c3 - 199, 250 * c3 + 1), 1000 * c0 - 500 * c5 - 501), 6… variable
7 …c6), 1000 * c0 - c6), 1000 * c3 - 2 * c6 + 2), 500 * c1 + (c6 + 1) / 2); c7 <= min(min(min(min(500…
8 s0(c0, c1, c2, c3, c2 / 3, c5, c6, c7);
H A Dfc2-0.c5 for (int c6 = c0 + 2; c6 <= n; c6 += 1) variable
6 s1(c0 + 1, n - c3, c6);
H A Dfc1-0.c5 for (int c6 = c0 + 2; c6 <= n; c6 += 1) variable
6 s1(c0 + 1, n - c3, c6);
H A Dfc1-1.c7 for (int c6 = c0 + 2; c6 <= n; c6 += 1) variable
8 s1(c0 + 1, n - c3, c6);
H A Dfc1-2.c7 for (int c6 = c0 + 2; c6 <= n; c6 += 1) variable
8 s1(c0 + 1, n - c3, c6);
H A Dfc2-1.c7 for (int c6 = c0 + 2; c6 <= n; c6 += 1) variable
8 s1(c0 + 1, n - c3, c6);
/llvm-project-15.0.7/mlir/test/Dialect/NVGPU/
H A Doptimize-shared-memory.mlir14 // CHECK: [[c6:%.+]] = arith.constant 6 : index
15 // CHECK: [[src_bits:%.+]] = arith.andi [[stRow]], [[c6]]
25 // CHECK: [[c6:%.+]] = arith.constant 6 : index
26 // CHECK: [[srcBits:%.+]] = arith.andi [[fragRow]], [[c6]]
71 // CHECK: [[c6:%.+]] = arith.constant 6 : index
82 // CHECK: [[c6:%.+]] = arith.constant 6 : index
91 // CHECK: [[c6:%.+]] = arith.constant 6 : index
101 // CHECK: [[c6:%.+]] = arith.constant 6 : index
109 // CHECK: [[c6:%.+]] = arith.constant 6 : index
117 // CHECK: [[c6:%.+]] = arith.constant 6 : index
[all …]
/llvm-project-15.0.7/libcxx/test/std/ranges/range.adaptors/range.counted/
H A Dcounted.pass.cpp82 auto c6 = std::views::counted(std::as_const(cit), 3); in test() local
91 ASSERT_SAME_TYPE(decltype(c6), std::span<const int>); in test()
100 assert(c6.data() == buffer && c6.size() == 3); in test()
114 auto c6 = std::views::counted(std::as_const(cit), 3); in test() local
123 ASSERT_SAME_TYPE(decltype(c6), std::ranges::subrange<random_access_iterator<const int*>>); in test()
132 assert(c6.begin() == cit && c6.end() == cit + 3); in test()
146 auto c6 = std::views::counted(std::as_const(cit), 3); in test() local
158 ASSERT_SAME_TYPE(decltype(c6), ConstExpected); in test()
167 assert(c6.begin().base() == cit && c6.size() == 3); in test()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dfast-isel-prolog-dbgloc.ll6 ;; void call_7i_1f (char c1, float f1, char c2, char c3, char c4, char c5, char c6, short s)
9 ;; c5 = 's'; c6 = 'f'; s = 77;
14 …8 signext %c2, i8 signext %c3, i8 signext %c4, i8 signext %c5, i8 signext %c6, i16 signext %s) !db…
22 %c6.addr = alloca i8, align 1
30 store i8 %c6, ptr %c6.addr, align 1
38 store i8 102, ptr %c6.addr, align 1, !dbg !15
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/
H A Dtest-create-mask.mlir12 %c6 = arith.constant 6 : index
48 scf.for %i = %c0 to %c6 step %c1 {
59 scf.for %i = %c0 to %c6 step %c1 {
70 scf.for %i = %c0 to %c6 step %c1 {
71 scf.for %j = %c0 to %c6 step %c1 {
/llvm-project-15.0.7/polly/test/ScheduleOptimizer/
H A Dprevectorization.ll75 ; CHECK: for (int c6 = 0; c6 <= 3; c6 += 1)
76 ; CHECK: Stmt_for_body8(32 * c0 + c3, 32 * c1 + 4 * c4 + c6, 32 * c2 + c5);
95 ; VEC16: for (int c6 = 0; c6 <= 15; c6 += 1)
96 ; VEC16: Stmt_for_body8(32 * c0 + c3, 32 * c1 + 16 * c4 + c6, 32 * c2 + c5);
H A Dfull_partial_tile_separation.ll15 ; CHECK-NEXT: for (int c6 = 0; c6 <= 3; c6 += 1)
16 ; CHECK-NEXT: Stmt_for_body_6(32 * c0 + c3, 32 * c1 + 4 * c4 + c6, 32 * c2 + c5);
23 ; CHECK-NEXT: for (int c6 = 0; c6 < nj % 4; c6 += 1)
24 ; CHECK-NEXT: Stmt_for_body_6(32 * c0 + c3, -(nj % 4) + nj + c6, 32 * c2 + c5);
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Darmv8.4a-tlb.txt57 #CHECK-NOV84: sys #0, c8, c6, #1, x3
123 #CHECK-NOV84: sys #0, c8, c6, #3, x3
124 #CHECK-NOV84: sys #0, c8, c6, #5, x3
125 #CHECK-NOV84: sys #0, c8, c6, #7, x3
140 #CHECK-NOV84: sys #4, c8, c6, #1, x3
141 #CHECK-NOV84: sys #4, c8, c6, #5, x3
146 #CHECK-NOV84: sys #6, c8, c6, #1, x3
147 #CHECK-NOV84: sys #6, c8, c6, #5, x3
H A Darmv8.7a-xs.txt233 # CHECK_NO_XS: sys #0, c9, c6, #1, x1
234 # CHECK_NO_XS: sys #0, c9, c6, #3, x1
235 # CHECK_NO_XS: sys #0, c9, c6, #5, x1
236 # CHECK_NO_XS: sys #0, c9, c6, #7, x1
251 # CHECK_NO_XS: sys #4, c9, c6, #1, x1
252 # CHECK_NO_XS: sys #4, c9, c6, #5, x1
257 # CHECK_NO_XS: sys #6, c9, c6, #1, x1
258 # CHECK_NO_XS: sys #6, c9, c6, #5, x1
/llvm-project-15.0.7/mlir/test/mlir-cpu-runner/
H A Dmemref-reinterpret-cast.mlir59 %c6 = arith.constant 6 : index
61 offset: [%c0], sizes: [%c1, %c6], strides: [%c6, %c1]
95 %c6 = arith.constant 6 : index
97 offset: [%c0], sizes: [%c1, %c6], strides: [%c6, %c1]
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dgas-compl-copr-reg.s4 @ CHECK: stc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x02,0xed]
11 @ CHECK: stc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x02,0xed]
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Linalg/CPU/
H A Dtest-conv-3d-call.mlir31 %c6 = arith.constant 6 : index
39 …%out3D = call @alloc_3d_filled_f32(%c6, %c6, %c6, %zero) : (index, index, index, f32) -> (memref<?…
H A Dtest-conv-2d-call.mlir31 %c6 = arith.constant 6 : index
39 %out2D = call @alloc_2d_filled_f32(%c6, %c6, %zero) : (index, index, f32) -> (memref<?x?xf32>)
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dlto-visibility-inference.cpp68 void f(C1 *c1, C2 *c2, C3 *c3, C4 *c4, C5 *c5, C6 *c6, std::C7 *c7, in f() argument
87 c6->f(); in f()
/llvm-project-15.0.7/mlir/test/Conversion/GPUCommon/
H A Dmemory-attrbution.mlir155 // NVVM: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
156 // NVVM: %[[descr8:.*]] = llvm.insertvalue %[[c6]], %[[descr7]][4, 1]
157 // NVVM: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
158 // NVVM: %[[descr9:.*]] = llvm.insertvalue %[[c6]], %[[descr8]][3, 2]
173 // ROCDL: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
174 // ROCDL: %[[descr8:.*]] = llvm.insertvalue %[[c6]], %[[descr7]][4, 1]
175 // ROCDL: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
176 // ROCDL: %[[descr9:.*]] = llvm.insertvalue %[[c6]], %[[descr8]][3, 2]
/llvm-project-15.0.7/llvm/test/Linker/
H A Dintrinsics-with-unnamed-types.ll22 ; CHECK-NEXT: %c6 = call %1*** @llvm.ssa.copy.p0p0p0s_s.1(%1*** %tmp3)
34 %c6 = call %1*** @llvm.ssa.copy.p0p0p0s_s.0(%1*** %tmp3)
54 ; CHECK-NEXT: %c6 = call %1*** @llvm.ssa.copy.p0p0p0s_s.1(%1*** %tmp3)
65 %c6 = call %1*** @llvm.ssa.copy.p0p0p0s_s.0(%1*** %tmp3)
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/
H A Dshow-encoding.s72 # WITHENCODINGS-NEXT: 1 3 1.00 4 c5 40 58 c6 …
74 # WITHENCODINGS-NEXT: 1 1 0.50 6 c4 c1 30 c6 c1 ff …
76 # WITHENCODINGS-NEXT: 1 1 0.50 3 44 39 c6 …

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