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/llvm-project-15.0.7/mlir/test/Transforms/
H A Dparallel-loop-collapsing.mlir19 %c14 = arith.constant 14 : index
24 to (%c2, %c5, %c8, %c26, %c14) step (%c1, %c4, %c7, %c10, %c13) {
/llvm-project-15.0.7/llvm/test/MC/SystemZ/
H A Dregs-good.s142 #CHECK: lctl %c14, %c15, 0 # encoding: [0xb7,0xef,0x00,0x00]
152 lctl %c14,%c15,0
241 #CHECK: .cfi_offset %c14, 430
307 .cfi_offset %c14,430
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/
H A Dtest-transfer-write.mlir81 %c14 = arith.constant 14: index
82 call @transfer_write17_1d(%A, %c14) : (memref<?xf32>, index) -> ()
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dbfloat16-a32_1.txt46 # NOBF16-NEXT: ldc2 p8, c14, [r0], #-320
74 # NOBF16-NEXT: ldc2 p8, c14, [r0], #-64
/llvm-project-15.0.7/clang/test/APINotes/
H A Dyaml-roundtrip.test15 CHECK-NEXT: 13c14
/llvm-project-15.0.7/llvm/test/Transforms/PGOProfile/
H A Dselect_hash_conflict.ll22 @c14 = common dso_local local_unnamed_addr global i8 0, align 1
83 %14 = load i8, ptr @c14, align 1
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dpr3502.ll13 tail call void asm sideeffect "mcr p15,0,$0,c7,c14,0", "r,~{memory}"(i32 0) nounwind
/llvm-project-15.0.7/clang/test/Headers/
H A Dwasm.c283 …c7, int8_t c8, int8_t c9, int8_t c10, int8_t c11, int8_t c12, int8_t c13, int8_t c14, int8_t c15) { in test_i8x16_make() argument
284 return wasm_i8x16_make(c0, c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15); in test_i8x16_make()
308 …8_t c8, uint8_t c9, uint8_t c10, uint8_t c11, uint8_t c12, uint8_t c13, uint8_t c14, uint8_t c15) { in test_u8x16_make() argument
309 return wasm_u8x16_make(c0, c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15); in test_u8x16_make()
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Darmv8.5a-mte.txt533 # NOMTE: sys #0, c7, c14, #4, x3
537 # NOMTE: sys #3, c7, c14, #3, x7
542 # NOMTE: sys #0, c7, c14, #6, x12
546 # NOMTE: sys #3, c7, c14, #5, x16
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dra-allocatable.ll77 @c14 = external global i32*
234 %89 = load i32*, i32** @c14, align 4
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Darith-fp-inseltpoison.ll749 %c14 = fadd float %a14, %b14
765 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
821 %c14 = fsub float %a14, %b14
837 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
893 %c14 = fmul float %a14, %b14
909 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
965 %c14 = fdiv float %a14, %b14
981 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
H A Darith-fp.ll749 %c14 = fadd float %a14, %b14
765 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
821 %c14 = fsub float %a14, %b14
837 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
893 %c14 = fmul float %a14, %b14
909 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
965 %c14 = fdiv float %a14, %b14
981 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
H A Dpowi.ll242 %c14 = call float @llvm.powi.f32(float %a14 , i32 -13)
258 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
H A Darith-add-saddo.ll245 %c14 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a14, i32 %b14)
261 %r14 = extractvalue {i32, i1} %c14, 0
524 %c14 = call {i16, i1} @llvm.sadd.with.overflow.i16(i16 %a14, i16 %b14)
556 %r14 = extractvalue {i16, i1} %c14, 0
1075 %c14 = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 %a14, i8 %b14)
1139 %r14 = extractvalue {i8, i1} %c14, 0
H A Darith-add-uaddo.ll245 %c14 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a14, i32 %b14)
261 %r14 = extractvalue {i32, i1} %c14, 0
524 %c14 = call {i16, i1} @llvm.uadd.with.overflow.i16(i16 %a14, i16 %b14)
556 %r14 = extractvalue {i16, i1} %c14, 0
1075 %c14 = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 %a14, i8 %b14)
1139 %r14 = extractvalue {i8, i1} %c14, 0
H A Darith-mul-umulo.ll245 %c14 = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %a14, i32 %b14)
261 %r14 = extractvalue {i32, i1} %c14, 0
524 %c14 = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %a14, i16 %b14)
556 %r14 = extractvalue {i16, i1} %c14, 0
1075 %c14 = call {i8, i1} @llvm.umul.with.overflow.i8(i8 %a14, i8 %b14)
1139 %r14 = extractvalue {i8, i1} %c14, 0
H A Darith-mul-smulo.ll245 %c14 = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %a14, i32 %b14)
261 %r14 = extractvalue {i32, i1} %c14, 0
524 %c14 = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %a14, i16 %b14)
556 %r14 = extractvalue {i16, i1} %c14, 0
1075 %c14 = call {i8, i1} @llvm.smul.with.overflow.i8(i8 %a14, i8 %b14)
1139 %r14 = extractvalue {i8, i1} %c14, 0
H A Darith-sub-ssubo.ll245 %c14 = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a14, i32 %b14)
261 %r14 = extractvalue {i32, i1} %c14, 0
524 %c14 = call {i16, i1} @llvm.ssub.with.overflow.i16(i16 %a14, i16 %b14)
556 %r14 = extractvalue {i16, i1} %c14, 0
1075 %c14 = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 %a14, i8 %b14)
1139 %r14 = extractvalue {i8, i1} %c14, 0
H A Darith-sub-usubo.ll245 %c14 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a14, i32 %b14)
261 %r14 = extractvalue {i32, i1} %c14, 0
524 %c14 = call {i16, i1} @llvm.usub.with.overflow.i16(i16 %a14, i16 %b14)
556 %r14 = extractvalue {i16, i1} %c14, 0
1075 %c14 = call {i8, i1} @llvm.usub.with.overflow.i8(i8 %a14, i8 %b14)
1139 %r14 = extractvalue {i8, i1} %c14, 0
H A Dfmuladd.ll370 …%c14 = load float, float* getelementptr inbounds ([16 x float], [16 x float]* @srcC32, i32 0, i64 …
386 %fmuladd14 = call float @llvm.fmuladd.f32(float %a14, float %b14, float %c14)
/llvm-project-15.0.7/clang/test/Misc/
H A Ddiag-template-diffing.cpp432 template<typename T> using c14 = b14; typedef
433 int f14(c14<int>);
/llvm-project-15.0.7/cross-project-tests/intrinsic-header-tests/
H A Dwasm_simd128.c160 int8_t c14, int8_t c15) { in test_i8x16_make() argument
162 c13, c14, c15); in test_i8x16_make()
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/bugprone/
H A Dstringview-nullptr.cpp560 std::string_view c14 = {{}}; // Default `const CharT*` in field_construction() member
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s1097 ldcl p6, c14, [r10], #16
1110 ldcleq p6, c14, [r10], #16
1138 @ CHECK: ldcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0xec]
1151 @ CHECK: ldcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0x0c]
2801 stcl p6, c14, [r10], #16
2814 stcleq p6, c14, [r10], #16
2842 @ CHECK: stcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0xec]
2855 @ CHECK: stcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0x0c]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td195 def UPCYCLELO: Rc<14, "upcyclelo", ["c14"]>, DwarfRegNum<[81]>;

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