Searched refs:buildInsertVectorElement (Results 1 – 7 of 7) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 677 auto InsElt = buildInsertVectorElement(DstTy, UndefVec, Src, Zero); in buildShuffleSplat()
787 MachineIRBuilder::buildInsertVectorElement(const DstOp &Res, const SrcOp &Val, in buildInsertVectorElement() function in MachineIRBuilder
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| H A D | IRTranslator.cpp | 2793 MIRBuilder.buildInsertVectorElement(Res, Val, Elt, Idx); in translateInsertElement()
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| H A D | LegalizerHelper.cpp | 2914 InsertedElt = MIRBuilder.buildInsertVectorElement( in bitcastInsertVectorElt()
3993 auto InsertPart = MIRBuilder.buildInsertVectorElement( in fewerElementsVectorExtractInsertVectorElt()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 468 Builder.buildInsertVectorElement(Dst, DstVec, Extract, DstCst); in applyINS()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 1158 MachineInstrBuilder buildInsertVectorElement(const DstOp &Res,
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | LegalizerHelperTest.cpp | 3928 B.buildInsertVectorElement(V8S16, VectorV8, Value, Seven); in TEST_F()
3930 B.buildInsertVectorElement(V8S16, VectorV8, Value, Seven); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 2885 auto InsLo = B.buildInsertVectorElement(Vec32, CastSrc, InsRegs[0], IdxLo); in applyMappingImpl()
2886 auto InsHi = B.buildInsertVectorElement(Vec32, InsLo, InsRegs[1], IdxHi); in applyMappingImpl()
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