| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 98 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | LanaiInstrInfo.cpp | 177 bool LanaiInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in LanaiInstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 236 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | SystemZInstrInfo.cpp | 520 bool SystemZInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in SystemZInstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 272 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | HexagonHardwareLoops.cpp | 473 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
657 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
1454 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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| H A D | HexagonSplitDouble.cpp | 512 bool OkCI = TII->analyzeCompare(*CmpI, CmpR1, CmpR2, Mask, Val); in collectIndRegsForLoop()
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| H A D | HexagonInstrInfo.cpp | 1871 bool HexagonInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in HexagonInstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 243 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | AArch64InstrInfo.cpp | 1107 bool AArch64InstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in AArch64InstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 518 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | X86InstrInfo.cpp | 3930 bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in X86InstrInfo
4029 if (!analyzeCompare(OI, OISrcReg, OISrcReg2, OIMask, OIValue) || in isRedundantFlagInstr()
4065 if (analyzeCompare(OI, OISrcReg, OISrcReg2, OIMask, OIValue) && in isRedundantFlagInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 620 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | PPCInstrInfo.cpp | 2354 bool PPCInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in PPCInstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 290 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | ARMBaseInstrInfo.cpp | 2797 bool ARMBaseInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in ARMBaseInstrInfo
3296 analyzeCompare(*Next, SrcReg, SrcReg2, CmpMask, CmpValue) && in shouldSink()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1543 virtual bool analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 323 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
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| H A D | SIInstrInfo.cpp | 8255 bool SIInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare() function in SIInstrInfo
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 630 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
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