Searched refs:allowsMemoryAccessForAlignment (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1710 bool TargetLoweringBase::allowsMemoryAccessForAlignment( in allowsMemoryAccessForAlignment() function in TargetLoweringBase
1730 bool TargetLoweringBase::allowsMemoryAccessForAlignment( in allowsMemoryAccessForAlignment() function in TargetLoweringBase
1733 return allowsMemoryAccessForAlignment(Context, DL, VT, MMO.getAddrSpace(), in allowsMemoryAccessForAlignment()
1742 return allowsMemoryAccessForAlignment(Context, DL, VT, AddrSpace, Alignment, in allowsMemoryAccess()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 416 if (allowsMemoryAccessForAlignment(Context, DAG.getDataLayout(), in LowerLOAD()
489 if (allowsMemoryAccessForAlignment(Context, DAG.getDataLayout(), in LowerSTORE()
1781 allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in PerformDAGCombine()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1713 bool allowsMemoryAccessForAlignment(
1723 bool allowsMemoryAccessForAlignment(LLVMContext &Context,
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 512 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeStoreOps()
623 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeStoreOps()
685 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeLoadOps()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 3029 if (allowsMemoryAccessForAlignment(Ctx, DL, LN->getMemoryVT(), in LowerUnalignedLoad()
3039 allowsMemoryAccessForAlignment(Ctx, DL, PartTy, *LN->getMemOperand()); in LowerUnalignedLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2273 if (!allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in LowerLOAD()
2316 !allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in LowerSTORE()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 3013 if (allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in expandUnalignedRVVLoad()
3043 if (allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in expandUnalignedRVVStore()
5834 assert(allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in lowerFixedLengthVectorLoadToRVV()
5868 assert(allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in lowerFixedLengthVectorStoreToRVV()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 687 return allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in isLoadBitCastBeneficial()
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| H A D | SIISelLowering.cpp | 8757 if (!allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in LowerLOAD()
9223 if (!allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), in LowerSTORE()
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