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/llvm-project-15.0.7/clang/test/Sema/
H A Daarch64-neon-ranges.c42 vld1_lane_s8(addr, small, 7); in test_ld1st1()
43 vld1_lane_s16(addr, small, 3); in test_ld1st1()
47 vld1q_lane_s8(addr, big, 15); in test_ld1st1()
48 vld1q_lane_s16(addr, big, 7); in test_ld1st1()
49 vld1q_lane_s32(addr, big, 3); in test_ld1st1()
50 vld1q_lane_s64(addr, big, 1); in test_ld1st1()
62 vst1_lane_s8(addr, small, 7); in test_ld1st1()
67 vst1q_lane_s8(addr, big, 15); in test_ld1st1()
68 vst1q_lane_s16(addr, big, 7); in test_ld1st1()
69 vst1q_lane_s32(addr, big, 3); in test_ld1st1()
[all …]
H A Dbuiltins-arm64-exclusive.c7 int test_ldrex(char *addr) { in test_ldrex() argument
9 sum += __builtin_arm_ldrex(addr); in test_ldrex()
10 sum += __builtin_arm_ldrex((short *)addr); in test_ldrex()
11 sum += __builtin_arm_ldrex((int *)addr); in test_ldrex()
14 sum += __builtin_arm_ldrex((float *)addr); in test_ldrex()
30 int test_strex(char *addr) { in test_strex() argument
33 res |= __builtin_arm_strex(4, addr); in test_strex()
56 int test_ldaex(char *addr) { in test_ldaex() argument
58 sum += __builtin_arm_ldaex(addr); in test_ldaex()
79 int test_stlex(char *addr) { in test_stlex() argument
[all …]
H A Dbuiltins-arm-exclusive.c7 int test_ldrex(char *addr) { in test_ldrex() argument
9 sum += __builtin_arm_ldrex(addr); in test_ldrex()
10 sum += __builtin_arm_ldrex((short *)addr); in test_ldrex()
11 sum += __builtin_arm_ldrex((int *)addr); in test_ldrex()
13 sum += __builtin_arm_ldrex((float *)addr); in test_ldrex()
15 sum += *__builtin_arm_ldrex((int **)addr); in test_ldrex()
31 int test_strex(char *addr) { in test_strex() argument
34 res |= __builtin_arm_strex(4, addr); in test_strex()
58 int test_ldaex(char *addr) { in test_ldaex() argument
60 sum += __builtin_arm_ldaex(addr); in test_ldaex()
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dinline-asm-x86-flag-output.c3 int test_cca(long nr, volatile long *addr) { in test_cca() argument
8 : "=@cca"(x), "=m"(*(volatile long *)(addr)) in test_cca()
16 int test_ccae(long nr, volatile long *addr) { in test_ccae() argument
29 int test_ccb(long nr, volatile long *addr) { in test_ccb() argument
42 int test_ccbe(long nr, volatile long *addr) { in test_ccbe() argument
55 int test_ccc(long nr, volatile long *addr) { in test_ccc() argument
68 int test_cce(long nr, volatile long *addr) { in test_cce() argument
81 int test_ccz(long nr, volatile long *addr) { in test_ccz() argument
94 int test_ccg(long nr, volatile long *addr) { in test_ccg() argument
107 int test_ccge(long nr, volatile long *addr) { in test_ccge() argument
[all …]
H A Dbuiltins-arm-exclusive.c12 sum += __builtin_arm_ldrex(addr); in test_ldrex()
19 sum += __builtin_arm_ldrex((short *)addr); in test_ldrex()
28 sum += __builtin_arm_ldrex((int *)addr); in test_ldrex()
105 sum += __builtin_arm_ldaex(addr); in test_ldaex()
194 int test_strex(char *addr) { in test_strex() argument
199 res |= __builtin_arm_strex(4, addr); in test_strex()
268 int test_stlex(char *addr) { in test_stlex() argument
273 res |= __builtin_arm_stlex(4, addr); in test_stlex()
357 return __builtin_arm_ldrex(addr); in test_ldrex_128()
372 return __builtin_arm_strex(val, addr); in test_strex_128()
[all …]
/llvm-project-15.0.7/compiler-rt/lib/tsan/rtl/
H A Dtsan_interface.inc21 void __tsan_read1(void *addr) {
25 void __tsan_read2(void *addr) {
29 void __tsan_read4(void *addr) {
33 void __tsan_read8(void *addr) {
37 void __tsan_read16(void *addr) {
122 return *addr;
128 return *addr;
134 return *addr;
139 *addr = v;
145 *addr = v;
[all …]
H A Dtsan_interface_java.cpp49 if (p + b->siz <= addr) in JavaHeapBlock()
166 DCHECK_GE(addr, jctx->heap_begin); in __tsan_java_mutex_lock()
169 MutexPostLock(thr, 0, addr, in __tsan_java_mutex_lock()
178 DCHECK_GE(addr, jctx->heap_begin); in __tsan_java_mutex_unlock()
181 MutexUnlock(thr, 0, addr); in __tsan_java_mutex_unlock()
191 MutexPostReadLock(thr, 0, addr, in __tsan_java_mutex_read_lock()
203 MutexReadUnlock(thr, 0, addr); in __tsan_java_mutex_read_unlock()
214 MutexPostLock(thr, 0, addr, in __tsan_java_mutex_lock_rec()
237 Acquire(thr, 0, addr); in __tsan_java_acquire()
247 Release(thr, 0, addr); in __tsan_java_release()
[all …]
/llvm-project-15.0.7/compiler-rt/lib/tsan/rtl-old/
H A Dtsan_interface.inc21 void __tsan_read1(void *addr) {
25 void __tsan_read2(void *addr) {
29 void __tsan_read4(void *addr) {
33 void __tsan_read8(void *addr) {
37 void __tsan_write1(void *addr) {
114 return *addr;
120 return *addr;
126 return *addr;
131 *addr = v;
137 *addr = v;
[all …]
H A Dtsan_interface_java.cpp49 if (p + b->siz <= addr) in JavaHeapBlock()
166 DCHECK_GE(addr, jctx->heap_begin); in __tsan_java_mutex_lock()
169 MutexPostLock(thr, 0, addr, in __tsan_java_mutex_lock()
178 DCHECK_GE(addr, jctx->heap_begin); in __tsan_java_mutex_unlock()
181 MutexUnlock(thr, 0, addr); in __tsan_java_mutex_unlock()
191 MutexPostReadLock(thr, 0, addr, in __tsan_java_mutex_read_lock()
203 MutexReadUnlock(thr, 0, addr); in __tsan_java_mutex_read_unlock()
214 MutexPostLock(thr, 0, addr, in __tsan_java_mutex_lock_rec()
237 Acquire(thr, 0, addr); in __tsan_java_acquire()
247 Release(thr, 0, addr); in __tsan_java_release()
[all …]
H A Dtsan_rtl_access.cpp39 ev->addr = CompressAddr(addr); in TryTraceMemoryAccess()
50 evex->addr = CompressAddr(addr); in TryTraceMemoryAccess()
72 ev->addr = CompressAddr(addr); in TryTraceMemoryAccessRange()
108 ev.addr = CompressAddr(addr); in TraceMutexLock()
120 ev.addr = CompressAddr(addr); in TraceMutexUnlock()
247 if (size >= 8 && (addr & ~7) == ((addr + 7) & ~7)) { in UnalignedMemoryAccess()
250 } else if (size >= 4 && (addr & ~7) == ((addr + 3) & ~7)) { in UnalignedMemoryAccess()
253 } else if (size >= 2 && (addr & ~7) == ((addr + 1) & ~7)) { in UnalignedMemoryAccess()
258 addr += size1; in UnalignedMemoryAccess()
436 if (!IsAppMem(addr) || !IsAppMem(addr + size - 1)) in MemoryRangeSet()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-zeroreg.ll10 define void @func(i64* %addr) {
18 %v0 = load volatile i64, i64* %addr
19 %v1 = load volatile i64, i64* %addr
20 %v2 = load volatile i64, i64* %addr
21 %v3 = load volatile i64, i64* %addr
53 store volatile i64 %v2, i64* %addr
57 store volatile i64 %v0, i64* %addr
58 store volatile i64 %v1, i64* %addr
59 store volatile i64 %v2, i64* %addr
60 store volatile i64 %v3, i64* %addr
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/X86/
H A Davx512pf-builtins.c12 void test_mm512_prefetch_i32gather_pd(__m256i index, void const *addr) { in test_mm512_prefetch_i32gather_pd() argument
15 return _mm512_prefetch_i32gather_pd(index, addr, 2, _MM_HINT_T0); in test_mm512_prefetch_i32gather_pd()
27 return _mm512_prefetch_i32gather_ps(index, addr, 2, _MM_HINT_T0); in test_mm512_prefetch_i32gather_ps()
39 return _mm512_prefetch_i64gather_pd(index, addr, 2, _MM_HINT_T0); in test_mm512_prefetch_i64gather_pd()
51 return _mm512_prefetch_i64gather_ps(index, addr, 2, _MM_HINT_T0); in test_mm512_prefetch_i64gather_ps()
54 void test_mm512_prefetch_i32scatter_pd(void *addr, __m256i index) { in test_mm512_prefetch_i32scatter_pd() argument
57 return _mm512_prefetch_i32scatter_pd(addr, index, 1, _MM_HINT_T1); in test_mm512_prefetch_i32scatter_pd()
66 void test_mm512_prefetch_i32scatter_ps(void *addr, __m512i index) { in test_mm512_prefetch_i32scatter_ps() argument
69 return _mm512_prefetch_i32scatter_ps(addr, index, 1, _MM_HINT_T1); in test_mm512_prefetch_i32scatter_ps()
78 void test_mm512_prefetch_i64scatter_pd(void *addr, __m512i index) { in test_mm512_prefetch_i64scatter_pd() argument
[all …]
H A Dx86-atomic-long_double.c63 return ++*addr; in testinc()
125 return (*addr)--; in testdec()
129 *addr -= 25; in testcompassign()
198 return *addr; in testcompassign()
221 *addr = 115; in testassign()
236 return *addr; in testassign()
297 return ++*addr; in test_volatile_inc()
362 *addr -= 25; in test_volatile_compassign()
430 return *addr; in test_volatile_compassign()
453 *addr = 115; in test_volatile_assign()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Datomicrmw.ll10 define i32 @atomic_add_zero(i32* %addr) {
18 define i32 @atomic_or_zero(i32* %addr) {
26 define i32 @atomic_sub_zero(i32* %addr) {
34 define i32 @atomic_and_allones(i32* %addr) {
49 define i32 @atomic_umax_zero(i32* %addr) {
125 define i16 @atomic_seq_cst(i16* %addr) {
143 define i16 @atomic_xor_zero(i16* %addr) {
153 define i16 @atomic_release(i16* %addr) {
163 define i16 @atomic_acq_rel(i16* %addr) {
172 define i32 @sat_or_allones(i32* %addr) {
[all …]
/llvm-project-15.0.7/compiler-rt/lib/asan/
H A Dasan_descriptions.cpp97 descr->addr = addr; in GetShadowAddressInformation()
106 descr->bad_addr = addr; in GetAccessToHeapChunkInformation()
161 descr->addr = addr; in GetHeapAddressInformation()
198 descr->addr = addr; in GetStackAddressInformation()
231 if (addr >= var.beg) { in PrintAccessAndVarIntersection()
242 else if (addr >= prev_var_end && addr - prev_var_end >= var.beg - addr_end) in PrintAccessAndVarIntersection()
281 if (addr < g.beg) { in DescribeAddressRelativeToGlobal()
285 if (addr < g.beg + g.size) addr = g.beg + g.size; in DescribeAddressRelativeToGlobal()
290 str.append("%p is located %zd bytes inside", (void *)addr, addr - g.beg); in DescribeAddressRelativeToGlobal()
303 descr->addr = addr; in GetGlobalAddressInformation()
[all …]
/llvm-project-15.0.7/clang/lib/Headers/
H A Davx512pfintrin.h22 (void const *)(addr), (int)(scale), \
25 #define _mm512_prefetch_i32gather_pd(index, addr, scale, hint) \ argument
27 (void const *)(addr), (int)(scale), \
35 #define _mm512_prefetch_i32gather_ps(index, addr, scale, hint) \ argument
45 #define _mm512_prefetch_i64gather_pd(index, addr, scale, hint) \ argument
54 #define _mm512_prefetch_i64gather_ps(index, addr, scale, hint) \ argument
58 #define _mm512_prefetch_i32scatter_pd(addr, index, scale, hint) \ argument
60 (void *)(addr), (int)(scale), \
65 (void *)(addr), (int)(scale), \
79 (void *)(addr), (int)(scale), \
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/arm-mve-intrinsics/
H A Dvld24.c21 return vld2q(addr); in test_vld2q_f16()
23 return vld2q_f16(addr); in test_vld2q_f16()
43 return vld4q(addr); in test_vld4q_u8()
45 return vld4q_u8(addr); in test_vld4q_u8()
60 vst2q(addr, value); in test_vst2q_u32()
62 vst2q_u32(addr, value); in test_vst2q_u32()
81 vst4q(addr, value); in test_vst4q_s8()
83 vst4q_s8(addr, value); in test_vst4q_s8()
98 vst2q(addr, value); in test_vst2q_f16()
120 v = vld2q(addr); in load_into_variable()
[all …]
/llvm-project-15.0.7/polly/test/CodeGen/
H A Dphi_scalar_simple_2.ll27 ; CHECK: %x.addr.0.merge = phi i32 [ %x.addr.0.final_reload, %polly.exiting ], [ %x.addr.0,…
35 ; CHECK: %x.addr.0.final_reload = load i32, i32* %x.addr.0.s2a
40 ; CHECK: store i32 %x.addr.0.phiops.reload[[R1]], i32* %x.addr.0.s2a
42 %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1, %for.inc5 ]
62 ; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.s2a
63 %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %x.addr.2, %for.inc ]
70 ; CHECK: %x.addr.1.s2a.reload = load i32, i32* %x.addr.1.s2a
71 ; CHECK: store i32 %x.addr.1.s2a.reload, i32* %x.addr.2.phiops
78 ; CHECK: store i32 %x.addr.2.phiops.reload, i32* %x.addr.2.s2a
79 %x.addr.2 = phi i32 [ %add, %if.then ], [ %x.addr.1, %for.body3 ]
[all …]
H A Dphi_scalar_simple_1.ll25 ; CHECK: %x.addr.0.merge = phi i32 [ %x.addr.0.final_reload, %polly.exiting ], [ %x.addr.0,…
32 ; CHECK: %x.addr.0.final_reload = load i32, i32* %x.addr.0.s2a
37 ; CHECK: store i32 %x.addr.0.phiops.reload[[R1]], i32* %x.addr.0.s2a
39 %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1.lcssa, %for.inc4 ]
45 ; CHECK: %x.addr.0.s2a.reload[[R2:[0-9]*]] = load i32, i32* %x.addr.0.s2a
46 ; CHECK: store i32 %x.addr.0.s2a.reload[[R2]], i32* %x.addr.1.phiops
51 ; CHECK: %x.addr.1.phiops.reload = load i32, i32* %x.addr.1.phiops
53 ; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.lcssa.phiops
54 %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %add, %for.inc ]
74 %x.addr.1.lcssa = phi i32 [ %x.addr.1, %for.cond1 ]
[all …]
/llvm-project-15.0.7/compiler-rt/test/msan/
H A Dmmap.cpp14 uintptr_t addr = (uintptr_t)p; in AddrIsApp() local
16 return addr < 0x010000000000ULL || addr >= 0x600000000000ULL; in AddrIsApp()
18 return (addr >= 0x000000000000ULL && addr < 0x010000000000ULL) || in AddrIsApp()
19 (addr >= 0x510000000000ULL && addr < 0x600000000000ULL) || in AddrIsApp()
20 (addr >= 0x700000000000ULL && addr < 0x800000000000ULL); in AddrIsApp()
22 return (addr >= 0x0000000000ULL && addr <= 0x0200000000ULL) || in AddrIsApp()
23 (addr >= 0xa200000000ULL && addr <= 0xc000000000ULL) || in AddrIsApp()
24 addr >= 0xe200000000ULL; in AddrIsApp()
26 return addr < 0x000100000000ULL || addr >= 0x300000000000ULL; in AddrIsApp()
29 (addr >= 0x440000000000ULL && addr < 0x500000000000); in AddrIsApp()
[all …]
/llvm-project-15.0.7/compiler-rt/test/sanitizer_common/TestCases/
H A Dsanitizer_coverage_trace_loads_stores.cpp12 void __sanitizer_cov_load1(uint8_t *addr) { printf("load1: %p\n", addr); } in __sanitizer_cov_load1() argument
13 void __sanitizer_cov_load2(uint16_t *addr) { printf("load2: %p\n", addr); } in __sanitizer_cov_load2() argument
14 void __sanitizer_cov_load4(uint32_t *addr) { printf("load4: %p\n", addr); } in __sanitizer_cov_load4() argument
15 void __sanitizer_cov_load8(uint64_t *addr) { printf("load8: %p\n", addr); } in __sanitizer_cov_load8() argument
16 void __sanitizer_cov_load16(__int128 *addr) { printf("load16: %p\n", addr); } in __sanitizer_cov_load16() argument
18 void __sanitizer_cov_store1(uint8_t *addr) { printf("store1: %p\n", addr); } in __sanitizer_cov_store1() argument
19 void __sanitizer_cov_store2(uint16_t *addr) { printf("store2: %p\n", addr); } in __sanitizer_cov_store2() argument
20 void __sanitizer_cov_store4(uint32_t *addr) { printf("store4: %p\n", addr); } in __sanitizer_cov_store4() argument
21 void __sanitizer_cov_store8(uint64_t *addr) { printf("store8: %p\n", addr); } in __sanitizer_cov_store8() argument
22 void __sanitizer_cov_store16(__int128 *addr) { printf("store16: %p\n", addr); } in __sanitizer_cov_store16() argument
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvldm-sched-a9.ll34 %el.0 = load i64, i64* %addr.0, align 8
36 %el.1 = load i64, i64* %addr.1, align 8
38 %el.2 = load i64, i64* %addr.2, align 8
40 %el.3 = load i64, i64* %addr.3, align 8
42 %el.4 = load i64, i64* %addr.4, align 8
44 %el.5 = load i64, i64* %addr.5, align 8
46 %el.6 = load i64, i64* %addr.6, align 8
48 %el.7 = load i64, i64* %addr.7, align 8
50 %el.8 = load i64, i64* %addr.8, align 8
52 %el.9 = load i64, i64* %addr.9, align 8
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dclr_set_toggle.ll8 %x.addr = alloca i32, align 4
9 store i32 %x, i32* %x.addr, align 4
19 %x.addr = alloca i64, align 8
30 %x.addr = alloca i64, align 8
41 %x.addr = alloca i32, align 4
52 %x.addr = alloca i64, align 8
63 %x.addr = alloca i64, align 8
89 %x.addr = alloca i32, align 4
100 %x.addr = alloca i64, align 8
111 %x.addr = alloca i32, align 4
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dpr30430.ll123 %f1.addr = alloca float, align 4
124 %f2.addr = alloca float, align 4
125 %f3.addr = alloca float, align 4
126 %f4.addr = alloca float, align 4
127 %f5.addr = alloca float, align 4
128 %f6.addr = alloca float, align 4
129 %f7.addr = alloca float, align 4
130 %f8.addr = alloca float, align 4
131 %f9.addr = alloca float, align 4
132 %f10.addr = alloca float, align 4
[all …]
/llvm-project-15.0.7/compiler-rt/lib/tsan/go/
H A Dtsan_go.cpp58 cbctx.pc = addr; in SymbolizeCode()
71 addr = cbctx.pc; in SymbolizeCode()
81 uptr addr; member
94 cbctx.addr = addr; in SymbolizeData()
166 MapShadow(addr, size); in __tsan_map_shadow()
241 Acquire(thr, 0, (uptr)addr); in __tsan_acquire()
253 Release(thr, 0, (uptr)addr); in __tsan_release_merge()
260 MutexPreLock(thr, 0, addr); in __tsan_mutex_before_lock()
267 MutexPostLock(thr, 0, addr); in __tsan_mutex_after_lock()
274 MutexUnlock(thr, 0, addr); in __tsan_mutex_before_unlock()
[all …]

12345678910>>...103