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/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dcsr-stubs-spill-threshold.ll7 define i32 @f1(i32 %a0, i32 %a11, i32 %a22, i32 %a33, i32 %a4, i32 %a5) #0 {
10 %v1 = call i32 @f0(i32 %a0, i32 %a11, i32 %a22, i32 %a33, i32 %a4, i32 %a5)
19 define i32 @f3(i32 %a0, i32 %a11, i32 %a22, i32 %a33, i32 %a44, i32 %a5) #0 {
22 %v1 = call i32 @f2(i32 %a0, i32 %a11, i32 %a22, i32 %a33)
32 define i32 @f5(i32 %a0, i32 %a11, i32 %a22, i32 %a33, i32 %a4, i32 %a5) #0 {
44 define i32 @f7(i32 %a0, i32 %a11, i32 %a22, i32 %a3, i32 %a4, i32 %a5) #0 {
H A Dcsr_stub_calls_dwarf_frame_info.ll11 define i32 @f1(i32 %a0, i32 %a11, i32 %a22, i32 %a33, i32 %a44) #0 {
15 %v2 = call i32 @f0(i32 %a22, i32 %a33)
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/autohvx/
H A Dvector-align-store.ll9 define void @f0(i16* %a0, i32 %a11, <64 x i16> %a22, <64 x i16> %a3) #0 {
14 store <64 x i16> %a22, <64 x i16>* %v2, align 2
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dconstexpr-many-arguments.cpp15 T a20, T a21, T a22) in type2()
18 a20, a21, a22} in type2()
H A Dbuiltin-classify-type.cpp67 int a22[__builtin_classify_type(complex_d) == complex_type_class ? 1 : -1]; in foo() local
H A Duninitialized.cpp269 …A *a22 = new A(a22->count); // expected-warning {{variable 'a22' is uninitialized when used withi… in setupA() local
331 A *a22 = new A(a22->count); variable
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Dinline-asm-amdgcn.cl17 …1},~{a12},~{a13},~{a14},~{a15},~{a16},~{a17},~{a18},~{a19},~{a20},~{a21},~{a22},~{a23},~{a24},~{a2…
23 "a16", "a17", "a18", "a19", "a20", "a21", "a22", "a23",
/llvm-project-15.0.7/llvm/test/LTO/Resolution/X86/
H A Dcomdat.ll19 ; RUN: -r=%t2.o,a22,px \
68 ; CHECK-DAG: @a22 = alias i16, ptr @v1.1{{$}}
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/
H A Dgnarly-setupcost.ll57 %a22 = add i32 %m21, 1
58 %m22 = mul i32 %a22, %m21
/llvm-project-15.0.7/llvm/test/tools/gold/X86/Inputs/
H A Dcomdat.ll24 @a22 = alias i16, bitcast (i32* @v1 to i16*)
/llvm-project-15.0.7/llvm/test/Linker/
H A Dcomdat-any.ll75 ; CHECK2-DAG: @a22 = alias i16, ptr @v1.1
117 @a22 = alias i16, ptr @v1
/llvm-project-15.0.7/llvm/test/LTO/Resolution/X86/Inputs/
H A Dcomdat.ll24 @a22 = alias i16, bitcast (i32* @v1 to i16*)
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dpreserve_mostcc64.ll81 %a22 = call <2 x double> asm sideeffect "", "={xmm14}"() nounwind
84 …a18, <2 x double> %a19, <2 x double> %a20, <2 x double> %a21, <2 x double> %a22, <2 x double> %a23)
H A Dpreserve_allcc64.ll99 %a22 = call <2 x double> asm sideeffect "", "={xmm14}"() nounwind
102 …a18, <2 x double> %a19, <2 x double> %a20, <2 x double> %a21, <2 x double> %a22, <2 x double> %a23)
H A Dbuild-vector-512.ll158 …i16 %a15, i16 %a16, i16 %a17, i16 %a18, i16 %a19, i16 %a20, i16 %a21, i16 %a22, i16 %a23, i16 %a24…
258 %ins22 = insertelement <32 x i16> %ins21, i16 %a22, i32 22
271 …8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, …
435 %ins22 = insertelement <64 x i8> %ins21, i8 %a22, i32 22
H A Dbuild-vector-256.ll232 …8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, …
402 %ins22 = insertelement <32 x i8> %ins21, i8 %a22, i32 22
/llvm-project-15.0.7/llvm/test/Transforms/CorrelatedValuePropagation/
H A Dcrash.ll87 %a22 = and i1 %a21, %a21
88 %a23 = and i1 %a22, %a22
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Danyregcc-vec.ll83 %a22 = call <2 x i64> asm sideeffect "", "={v22}"() nounwind
94 …<2 x i64> %a18, <2 x i64> %a19, <2 x i64> %a20, <2 x i64> %a21, <2 x i64> %a22, <2 x i64> %a23, <2…
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dra-allocatable.ll47 @a22 = external global i32
167 %44 = load i32, i32* @a22, align 4
257 %104 = load i32, i32* @a22, align 4
/llvm-project-15.0.7/llvm/test/tools/gold/X86/
H A Dcomdat.ll51 ; RES: 2.o,a22,px{{$}}
/llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/
H A Dmasked-cmp.ll256 %a22 = and i64 %t22, %a21
257 %a23 = and i64 %t23, %a22
/llvm-project-15.0.7/llvm/test/Transforms/GuardWidening/
H A Dbasic.ll422 %a22 = mul i32 %a21, %a21
423 %a23 = mul i32 %a22, %a22
H A Dbasic_widenable_condition_guards.ll807 %a22 = mul i32 %a21, %a21
808 %a23 = mul i32 %a22, %a22
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dagpr-copy-no-free-registers.ll45 ; GFX908-NEXT: v_accvgpr_write_b32 a22, v34
176 ; GFX90A-NEXT: v_accvgpr_mov_b32 a22, a6
421 ; GFX908-NEXT: v_accvgpr_write_b32 a22, v35
479 ; GFX90A-NEXT: v_accvgpr_mov_b32 a22, a6
905 ; GFX908-NEXT: v_accvgpr_write_b32 a22, v34
1036 ; GFX90A-NEXT: v_accvgpr_write_b32 a22, s6
/llvm-project-15.0.7/llvm/test/Instrumentation/DataFlowSanitizer/
H A Dorigin_call.ll12 i1 %a20, i1 %a21, i1 %a22, i1 %a23, i1 %a24, i1 %a25, i1 %a26, i1 %a27, i1 %a28, i1 %a29,

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