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/llvm-project-15.0.7/llvm/test/tools/llvm-rc/Inputs/
H A Dtag-escape.rc5 3 "\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g"
15 23 L"\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g"
27 MENUITEM "\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g", 3
39 MENUITEM L"\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g", 3
51 "\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g",
63 L"\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g",
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/bugprone/
H A Dcopy-constructor-init.cpp144 class X12 : public CopyableAlias<float> { class
145 X12(const X12 &other) {} in X12() function in X12
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-reserve-call-saved-reg.ll13 …ux-gnu -mattr=+reserve-x12 -mattr=+call-saved-x12 -o - %s | FileCheck %s --check-prefixes=CHECK-X12
14 …=+reserve-x12 -mattr=+call-saved-x12 -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK-X12
15 …tr=+reserve-x12 -mattr=+call-saved-x12 -fast-isel -o - %s | FileCheck %s --check-prefixes=CHECK-X12
42 ; CHECK-X12-NOT: str x12, [sp
54 ; CHECK-X12-NOT: ldr x12
62 ; CHECK-X12-NOT: str x12
71 ; CHECK-X12-NOT: ldr x12, [sp
H A Darm64-custom-call-saved-reg.ll14 ; RUN: | FileCheck %s --check-prefix=CHECK-SAVED-X12
68 ; CHECK-SAVED-X12: str x12, [sp
94 ; CHECK-SAVED-X12: ldr x12, [sp
112 ; CHECK-SAVED-X12: adrp x12, var
H A Darm64-platform-reg.ll19 …nux-gnu -mattr=+reserve-x12 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X12
84 ; RUN: --check-prefix=CHECK-RESERVE-X12 \
126 ; CHECK-RESERVE-X12-NOT: ldr x12,
153 ; CHECK-RESERVE-X12-NOT: ldr x12,
/llvm-project-15.0.7/clang/test/CodeGen/
H A Doverride-layout.c103 struct PACKED X12 { struct
149 struct X12 x12; in use_structs()
150 x12.x = sizeof(struct X12); in use_structs()
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Darmv8.4a-ldst.s136 LDAPUR X12, [X3]
137 LDAPUR X12, [X3, #-256]
H A Darmv8.4a-ldst-error.s59 LDAPUR X12, [X3, #-257]
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dnew-delete.cpp297 struct X12 { struct
301 struct X13 : X12 {
302 using X12::operator new;
/llvm-project-15.0.7/llvm/lib/ToolDrivers/llvm-dlltool/
H A DDlltoolDriver.cpp45 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
47 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dreserved-regs.ll19 …lc -mtriple=riscv32 -mattr=+reserve-x12 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X12
20 …lc -mtriple=riscv64 -mattr=+reserve-x12 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X12
88 ; X12-NOT: lw a2,
89 ; X12-NOT: ld a2,
/llvm-project-15.0.7/lld/ELF/
H A DDriverUtils.cpp43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
45 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/lld/MachO/
H A DDriverUtils.cpp44 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
46 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h43 case AArch64::X12: return AArch64::W12; in getWRegFromXReg()
83 case AArch64::W12: return AArch64::X12; in getXRegFromWReg()
117 case AArch64::X12_X13_X14_X15_X16_X17_X18_X19: return AArch64::X12; in getXRegFromXRegTuple()
/llvm-project-15.0.7/llvm/lib/ToolDrivers/llvm-lib/
H A DLibDriver.cpp48 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
50 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/lld/MinGW/
H A DDriver.cpp70 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
72 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SLSHardening.cpp161 { "__llvm_slsblr_thunk_x12", AArch64::X12},
/llvm-project-15.0.7/lld/wasm/
H A DDriver.cpp110 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
112 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/lld/COFF/
H A DDriverUtils.cpp793 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
795 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstr64Bit.td1507 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1509 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1514 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1516 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1535 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1565 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
H A DPPCAsmPrinter.cpp1782 .addReg(PPC::X12) in emitFunctionBodyStart()
1799 .addReg(PPC::X12)); in emitFunctionBodyStart()
1803 .addReg(PPC::X12)); in emitFunctionBodyStart()
H A DPPCFrameLowering.cpp446 Register R12 = Subtarget.isPPC64() ? PPC::X12 : PPC::R12; in findScratchRegister()
654 Register TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitPrologue()
1563 Register TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitEpilogue()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp116 {codeview::RegisterId::ARM64_X12, AArch64::X12}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td94 def X12 : RISCVReg<12,"x12", ["a2"]>, DwarfRegNum<[12]>;
H A DRISCVFrameLowering.cpp880 RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, in determineCalleeSaves()

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