Searched refs:WaveSize (Results 1 – 4 of 4) sorted by relevance
291 unsigned WaveSize = ST.getWavefrontSize(); in haveFreeLanesForSGPRSpill() local292 return NumVGPRSpillLanes + NumNeed <= WaveSize * SpillVGPRs.size(); in haveFreeLanesForSGPRSpill()308 unsigned WaveSize = ST.getWavefrontSize(); in allocateSGPRSpillToVGPR() local313 if (NumLanes > WaveSize) in allocateSGPRSpillToVGPR()323 unsigned VGPRIndex = (NumVGPRSpillLanes % WaveSize); in allocateSGPRSpillToVGPR()
322 const unsigned WaveSize = getWavefrontSize(); in getOccupancyWithLocalMemSize() local337 const unsigned MaxGroupNumWaves = (MaxWorkGroupSize + WaveSize - 1) / WaveSize; in getOccupancyWithLocalMemSize()
1192 auto WaveSize = B.buildConstant(LLT::scalar(32), ST.getWavefrontSizeLog2()); in applyMappingDynStackAlloc() local1193 auto ScaledSize = B.buildShl(IntPtrTy, AllocSize, WaveSize); in applyMappingDynStackAlloc()4630 unsigned WaveSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping() local4632 OpdsMapping[1] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, WaveSize); in getInstrMapping()4633 OpdsMapping[3] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, WaveSize); in getInstrMapping()
4154 unsigned WaveSize = TRI->getRegSizeInBits(*Src2RC); in EmitInstrWithCustomInserter() local4155 assert(WaveSize == 64 || WaveSize == 32); in EmitInstrWithCustomInserter()4157 if (WaveSize == 64) { in EmitInstrWithCustomInserter()4188 (WaveSize == 64) ? AMDGPU::S_CSELECT_B64 : AMDGPU::S_CSELECT_B32; in EmitInstrWithCustomInserter()12855 unsigned WaveSize) { in hasCFUser() argument12860 if (!IT || IT->getBitWidth() != WaveSize) in hasCFUser()12894 Result = hasCFUser(U, Visited, WaveSize); in hasCFUser()