Home
last modified time | relevance | path

Searched refs:WS (Results 1 – 25 of 40) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp29 Write(WS) {} in WriteRef()
108 if (WS.isEliminated()) in onInstructionExecuted()
127 if (WR.getWriteState() == &WS) in onInstructionExecuted()
136 if (!WS.clearsSuperRegisters()) in onInstructionExecuted()
283 WS.clearsSuperRegisters() ? RegID : WS.getRegisterID(); in addRegisterWrite()
319 if (!WS.clearsSuperRegisters()) in addRegisterWrite()
336 if (WS.isEliminated()) in removeRegisterWrite()
365 if (WR.getWriteState() == &WS) in removeRegisterWrite()
374 if (!WS.clearsSuperRegisters()) in removeRegisterWrite()
479 WS.setWriteZero(); in tryEliminateMoveOrSwap()
[all …]
/llvm-project-15.0.7/llvm/lib/MC/
H A DWasmObjectWriter.cpp473 if (WS.isDefined() && WS.isFunction() && !WS.isVariable()) { in executePostLayoutBinding()
1364 if (WS.isTag()) in prepareImports()
1371 if (!WS.isDefined() && !WS.isComdat()) { in prepareImports()
1382 if (WS.isWeak()) in prepareImports()
1394 if (WS.isWeak()) in prepareImports()
1584 if (WS.isComdat() && !WS.isDefined()) in writeOneObject()
1789 if (WS.isWeak()) in writeOneObject()
1791 if (WS.isHidden()) in writeOneObject()
1793 if (!WS.isExternal() && WS.isDefined()) in writeOneObject()
1807 if (WS.isTLS()) in writeOneObject()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/msa/
H A D2rf.ll21 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
22 ; CHECK-DAG: flog2.w [[WD:\$w[0-9]+]], [[WS]]
42 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
43 ; CHECK-DAG: flog2.d [[WD:\$w[0-9]+]], [[WS]]
60 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
61 ; CHECK-DAG: flog2.w [[WD:\$w[0-9]+]], [[WS]]
78 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
79 ; CHECK-DAG: flog2.d [[WD:\$w[0-9]+]], [[WS]]
99 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
100 ; CHECK-DAG: frint.w [[WD:\$w[0-9]+]], [[WS]]
[all …]
H A Delm_copy.ll29 ; MIPS-ANY-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
30 ; MIPS-ANY-DAG: copy_s.b [[RD:\$[0-9]+]], [[WS]][1]
52 ; MIPS-ANY-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
75 ; MIPS-ANY-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
98 ; MIPS32-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
99 ; MIPS64-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
102 ; MIPS64-DAG: copy_s.d [[RD:\$[0-9]+]], [[WS]][1]
126 ; MIPS-ANY-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
149 ; MIPS-ANY-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
196 ; MIPS32-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
[all …]
H A D3r-s.ll29 ; CHECK-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R2]])
31 ; CHECK-DAG: sld.b [[WD]], [[WS]][[[RT]]]
57 ; CHECK-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R2]])
59 ; CHECK-DAG: sld.h [[WD]], [[WS]][[[RT]]]
85 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R2]])
87 ; CHECK-DAG: sld.w [[WD]], [[WS]][[[RT]]]
113 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R2]])
115 ; CHECK-DAG: sld.d [[WD]], [[WS]][[[RT]]]
137 ; CHECK-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
161 ; CHECK-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
[all …]
H A D2r.ll21 ; CHECK-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
22 ; CHECK-DAG: nloc.b [[WD:\$w[0-9]+]], [[WS]]
42 ; CHECK-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
43 ; CHECK-DAG: nloc.h [[WD:\$w[0-9]+]], [[WS]]
63 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
64 ; CHECK-DAG: nloc.w [[WD:\$w[0-9]+]], [[WS]]
84 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
85 ; CHECK-DAG: nloc.d [[WD:\$w[0-9]+]], [[WS]]
106 ; CHECK-DAG: nlzc.b [[WD:\$w[0-9]+]], [[WS]]
127 ; CHECK-DAG: nlzc.h [[WD:\$w[0-9]+]], [[WS]]
[all …]
H A D2rf_int_float.ll23 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
24 ; CHECK-DAG: fclass.w [[WD:\$w[0-9]+]], [[WS]]
44 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
45 ; CHECK-DAG: fclass.d [[WD:\$w[0-9]+]], [[WS]]
65 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
86 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
107 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
128 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
149 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
170 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
[all …]
H A D3r-a.ll30 ; CHECK-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
55 ; CHECK-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
80 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
105 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
130 ; CHECK-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
155 ; CHECK-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
180 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
205 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
230 ; CHECK-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
255 ; CHECK-DAG: ld.h [[WS:\$w[0-9]+]], 0([[R1]])
[all …]
H A D2rf_float_int.ll22 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
23 ; CHECK-DAG: ffint_s.w [[WD:\$w[0-9]+]], [[WS]]
43 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
44 ; CHECK-DAG: ffint_s.d [[WD:\$w[0-9]+]], [[WS]]
64 ; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
65 ; CHECK-DAG: ffint_u.w [[WD:\$w[0-9]+]], [[WS]]
85 ; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
86 ; CHECK-DAG: ffint_u.d [[WD:\$w[0-9]+]], [[WS]]
/llvm-project-15.0.7/llvm/lib/ObjCopy/wasm/
H A DWasmReader.cpp24 const WasmSection &WS = WasmObj.getWasmSection(Sec); in create() local
26 {static_cast<uint8_t>(WS.Type), WS.Name, WS.Content}); in create()
/llvm-project-15.0.7/llvm/lib/MC/MCParser/
H A DWasmAsmParser.cpp190 MCSectionWasm *WS = getContext().getWasmSection( in parseSectionDirective() local
193 if (WS->getSegmentFlags() != Flags) in parseSectionDirective()
196 utohexstr(WS->getSegmentFlags())); in parseSectionDirective()
199 if (!WS->isWasmData()) in parseSectionDirective()
201 WS->setPassive(); in parseSectionDirective()
204 getStreamer().switchSection(WS); in parseSectionDirective()
/llvm-project-15.0.7/llvm/lib/MCA/Stages/
H A DInOrderIssueStage.cpp90 for (const WriteState &WS : IR.getInstruction()->getDefs()) { in findFirstWriteBackCycle() local
91 int CyclesLeft = WS.getCyclesLeft(); in findFirstWriteBackCycle()
93 CyclesLeft = WS.getLatency(); in findFirstWriteBackCycle()
165 for (WriteState &WS : IS.getDefs()) in addRegisterReadWrite()
166 PRF.addRegisterWrite(WriteRef(SourceIndex, &WS), UsedRegs); in addRegisterReadWrite()
341 for (const WriteState &WS : IS.getDefs()) in retireInstruction() local
342 PRF.removeRegisterWrite(WS, FreedRegs); in retireInstruction()
H A DRetireStage.cpp69 for (const WriteState &WS : Inst.getDefs()) in notifyInstructionRetired() local
70 PRF.removeRegisterWrite(WS, FreedRegs); in notifyInstructionRetired()
H A DDispatchStage.cpp119 for (WriteState &WS : IS.getDefs()) in dispatch()
120 PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), &WS), RegisterFiles); in dispatch()
/llvm-project-15.0.7/llvm/lib/MCA/
H A DInstruction.cpp136 for (const WriteState &WS : getDefs()) { in computeCriticalRegDep() local
137 const CriticalDependency &WriteCRD = WS.getCriticalRegDep(); in computeCriticalRegDep()
180 for (WriteState &WS : getDefs()) in execute()
181 WS.onInstructionIssued(IID); in execute()
/llvm-project-15.0.7/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h51 WriteRef(unsigned SourceIndex, WriteState *WS);
264 void removeRegisterWrite(const WriteState &WS,
269 bool canEliminateMove(const WriteState &WS, const ReadState &RS,
/llvm-project-15.0.7/llvm/tools/llvm-mca/Views/
H A DRegisterFileStatistics.cpp67 const WriteState &WS = Inst.getDefs()[I]; in updateMoveElimInfo() local
73 if (WS.isEliminated()) in updateMoveElimInfo()
75 if (WS.isWriteZero() && RS.isReadZero()) in updateMoveElimInfo()
/llvm-project-15.0.7/lldb/source/Host/common/
H A DHost.cpp579 void llvm::format_provider<WaitStatus>::format(const WaitStatus &WS, in format() argument
584 switch (WS.type) { in format()
595 OS << formatv("{0}{1:x-2}", type, WS.status); in format()
601 switch(WS.type) { in format()
612 OS << desc << " " << int(WS.status); in format()
/llvm-project-15.0.7/clang/test/Sema/
H A Dms-keyword-system-header.c10 WS ws; in fn()
/llvm-project-15.0.7/clang/test/Sema/Inputs/
H A Dms-keyword-system-header.h9 } WS __attribute__((__transparent_union__)); typedef
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DLexicalScopes.cpp243 LexicalScope *WS = ScopePosition.first; in constructScopeNest() local
245 const SmallVectorImpl<LexicalScope *> &Children = WS->getChildren(); in constructScopeNest()
252 WS->setDFSOut(++Counter); in constructScopeNest()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmParser.cpp764 auto WS = cast<MCSectionWasm>(getStreamer().getCurrentSection().first); in CheckDataSection() local
765 if (WS && WS->getKind().isText()) in CheckDataSection()
1095 auto *WS = in doBeforeLabelEmit() local
1098 getStreamer().switchSection(WS); in doBeforeLabelEmit()
1101 getContext().addGenDwarfSection(WS); in doBeforeLabelEmit()
/llvm-project-15.0.7/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp2976 LexicalScope *WS = ScopePosition.first; in makeDepthFirstEjectionMap() local
2992 auto DILocationIt = ScopeToDILocation.find(WS); in makeDepthFirstEjectionMap()
2995 ScopeToAssignBlocks.find(WS)->second); in makeDepthFirstEjectionMap()
2999 EjectionMap[BBNum] = WS->getDFSOut(); in makeDepthFirstEjectionMap()
3066 LexicalScope *WS = ScopePosition.first; in depthFirstVLocAndEmit() local
3074 auto DILocIt = ScopeToDILocation.find(WS); in depthFirstVLocAndEmit()
3077 auto &VarsWeCareAbout = ScopeToVars.find(WS)->second; in depthFirstVLocAndEmit()
3084 HighestDFSIn = std::max(HighestDFSIn, WS->getDFSIn()); in depthFirstVLocAndEmit()
3097 auto DILocationIt = ScopeToDILocation.find(WS); in depthFirstVLocAndEmit()
3102 ScopeToAssignBlocks.find(WS)->second); in depthFirstVLocAndEmit()
[all …]
/llvm-project-15.0.7/lldb/include/lldb/Host/
H A DHost.h278 static void format(const lldb_private::WaitStatus &WS, raw_ostream &OS,
/llvm-project-15.0.7/clang-tools-extra/clangd/refactor/tweaks/
H A DExtractVariable.cpp379 if (const auto* WS = llvm::dyn_cast<WhileStmt>(Outer)) in childExprIsStmt() local
380 return Inner == WS->getBody(); in childExprIsStmt()

12