Searched refs:VecLd (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 69 SmallVector<LoadInst*, 2> VecLd; // Container for loads to widen. member
79 return VecLd.front(); in getBaseLoad()
575 if (AreSequentialLoads(Ld0, Ld1, PMul0->VecLd)) { in CreateParallelPairs()
576 if (AreSequentialLoads(Ld2, Ld3, PMul1->VecLd)) { in CreateParallelPairs()
580 } else if (AreSequentialLoads(Ld3, Ld2, PMul1->VecLd)) { in CreateParallelPairs()
586 } else if (AreSequentialLoads(Ld1, Ld0, PMul0->VecLd) && in CreateParallelPairs()
587 AreSequentialLoads(Ld2, Ld3, PMul1->VecLd)) { in CreateParallelPairs()
722 WideLoads[BaseLHS]->getLoad() : CreateWideLoad(LHSMul->VecLd, Ty); in InsertParallelMACs()
724 WideLoads[BaseRHS]->getLoad() : CreateWideLoad(RHSMul->VecLd, Ty); in InsertParallelMACs()
|
| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 247 Value *VecLd = Builder.CreateAlignedLoad(MinVecTy, CastedPtr, Alignment); in vectorizeLoadInsert() local
248 VecLd = Builder.CreateShuffleVector(VecLd, Mask); in vectorizeLoadInsert()
250 replaceValue(I, *VecLd); in vectorizeLoadInsert()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 49188 SDValue VecLd = DAG.getLoad(VT, DL, ML->getChain(), ML->getBasePtr(), in combineMaskedLoadConstantMask() local
49190 SDValue Blend = DAG.getSelect(DL, VT, ML->getMask(), VecLd, in combineMaskedLoadConstantMask()
49192 return DCI.CombineTo(ML, Blend, VecLd.getValue(1), true); in combineMaskedLoadConstantMask()
54306 auto *VecLd = dyn_cast<LoadSDNode>(Vec); in combineINSERT_SUBVECTOR() local
54308 if (VecLd && SubLd && in combineINSERT_SUBVECTOR()
54309 DAG.areNonVolatileConsecutiveLoads(SubLd, VecLd, in combineINSERT_SUBVECTOR()
|