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Searched refs:VST (Results 1 – 25 of 26) sorted by relevance

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/llvm-project-15.0.7/llvm/test/Bitcode/
H A Dvst-forward-declaration.ll2 ; Check for VST forward declaration record and VST function index records.
/llvm-project-15.0.7/llvm/lib/IR/
H A DValue.cpp412 ValueSymbolTable *VST; in takeName() local
413 bool Failure = getSymTab(V, VST); in takeName()
418 if (ST == VST) { in takeName()
429 if (VST) in takeName()
430 VST->removeValueName(V->getValueName()); in takeName()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVVPInstrPatternsVec.td49 defm : VectorStore<v256f64, i64, v256i1, "VST", "VST">;
50 defm : VectorStore<v256i64, i64, v256i1, "VST", "VST">;
H A DVEInstrFormats.td48 /// For example, the index of VL of (VST $sy, $sz, $sx, $vl) is 3 (beginning
49 /// from 0), and the index of VL of (VST $sy, $sz, $sx, $vm, $vl) is 4. We
H A DVEInstrVec.td181 // Multiclass for VST instructions
214 // Section 8.9.7 - VST (Vector Store)
215 defm VST : VSTm<"vst", 0x91, V64>;
217 // Section 8.9.8 - VST (Vector Store Upper)
/llvm-project-15.0.7/llvm/lib/Bitcode/Writer/
H A DValueEnumerator.cpp572 void ValueEnumerator::EnumerateValueSymbolTable(const ValueSymbolTable &VST) { in EnumerateValueSymbolTable() argument
573 for (ValueSymbolTable::const_iterator VI = VST.begin(), VE = VST.end(); in EnumerateValueSymbolTable()
H A DBitcodeWriter.cpp394 void writeFunctionLevelValueSymbolTable(const ValueSymbolTable &VST);
3275 const ValueSymbolTable &VST) { in writeFunctionLevelValueSymbolTable() argument
3276 if (VST.empty()) in writeFunctionLevelValueSymbolTable()
3285 for (const ValueName &Name : VST) { in writeFunctionLevelValueSymbolTable()
/llvm-project-15.0.7/llvm/lib/Target/DirectX/DXILWriter/
H A DDXILValueEnumerator.cpp576 void ValueEnumerator::EnumerateValueSymbolTable(const ValueSymbolTable &VST) { in EnumerateValueSymbolTable() argument
577 for (ValueSymbolTable::const_iterator VI = VST.begin(), VE = VST.end(); in EnumerateValueSymbolTable()
H A DDXILBitcodeWriter.cpp336 void writeFunctionLevelValueSymbolTable(const ValueSymbolTable &VST);
2568 const ValueSymbolTable &VST) { in writeFunctionLevelValueSymbolTable() argument
2569 if (VST.empty()) in writeFunctionLevelValueSymbolTable()
2580 for (auto &VI : VST) { in writeFunctionLevelValueSymbolTable()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleM4.td115 def : M4UnitL1I<(instregex "VST")>;
H A DARMScheduleA57.td147 "VST(1|2)LN(d|q)(WB_fixed_|WB_register_)?Asm",
148 "VST(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
H A DARMInstrInfo.td1313 // VLD/VST instructions and checking the alignment is not specified.
1324 // VLD/VST instructions and checking the alignment value.
1335 // VLD/VST instructions and checking the alignment value.
1346 // VLD/VST instructions and checking the alignment value.
1357 // for VLD/VST instructions and checking the alignment value.
1368 // encoding for VLD/VST instructions and checking the alignment value.
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dvec-move-03.ll185 ; Test that the alignment hint for VST is emitted also when CFG optimizer
H A Dvec-intrinsics-02.ll213 ; VSTRL with length >= 15 should become VST.
H A Dvec-intrinsics-01.ll675 ; VSTL with length >= 15 should become VST.
/llvm-project-15.0.7/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvst.ll6 ;;; We test VST*rrvl, VST*rrvml, VST*irvl, and VST*irvml instructions.
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZAsmPrinter.cpp444 case SystemZ::VST: in emitInstruction()
H A DSystemZInstrVector.td214 defm VST : StoreVRXAlign<"vst", 0xE70E>;
454 (VST VR128:$src, bdxaddr12only:$addr)>;
1658 (VST VR128:$src, bdxaddr12only:$addr)>;
H A DSystemZFrameLowering.cpp675 MBBI->getOpcode() == SystemZ::VST) in emitPrologue()
H A DSystemZInstrInfo.cpp1629 StoreOpcode = SystemZ::VST; in getLoadStoreOpcodes()
H A DSystemZScheduleZ13.td1210 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>;
H A DSystemZScheduleZ16.td1256 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>;
H A DSystemZScheduleZ15.td1250 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>;
H A DSystemZScheduleZ14.td1229 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp7957 MVT VST; in LowerBitreverse() local
7964 VST = MVT::v8i8; in LowerBitreverse()
7965 REVB = DAG.getNode(AArch64ISD::REV32, DL, VST, Op.getOperand(0)); in LowerBitreverse()
7971 VST = MVT::v16i8; in LowerBitreverse()
7972 REVB = DAG.getNode(AArch64ISD::REV32, DL, VST, Op.getOperand(0)); in LowerBitreverse()
7978 VST = MVT::v8i8; in LowerBitreverse()
7979 REVB = DAG.getNode(AArch64ISD::REV64, DL, VST, Op.getOperand(0)); in LowerBitreverse()
7985 VST = MVT::v16i8; in LowerBitreverse()
7986 REVB = DAG.getNode(AArch64ISD::REV64, DL, VST, Op.getOperand(0)); in LowerBitreverse()
7993 DAG.getNode(ISD::BITREVERSE, DL, VST, REVB)); in LowerBitreverse()

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