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Searched refs:VPlan (Results 1 – 25 of 37) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/
H A DVPlanTransforms.h37 static bool sinkScalarOperands(VPlan &Plan);
39 static bool mergeReplicateRegions(VPlan &Plan);
47 static void removeRedundantInductionCasts(VPlan &Plan);
51 static void removeRedundantCanonicalIVs(VPlan &Plan);
53 static void removeDeadRecipes(VPlan &Plan);
59 static void optimizeInductions(VPlan &Plan, ScalarEvolution &SE);
63 static void removeRedundantExpandSCEVRecipes(VPlan &Plan);
H A DVPlanHCFGBuilder.h35 class VPlan; variable
50 VPlan &Plan;
65 VPlanHCFGBuilder(Loop *Lp, LoopInfo *LI, VPlan &P) in VPlanHCFGBuilder()
H A DVPlanVerifier.h29 class VPlan; variable
44 static bool verifyPlanIsValid(const VPlan &Plan);
H A DVPlanTransforms.cpp104 bool VPlanTransforms::sinkScalarOperands(VPlan &Plan) { in sinkScalarOperands()
215 bool VPlanTransforms::mergeReplicateRegions(VPlan &Plan) { in mergeReplicateRegions()
299 void VPlanTransforms::removeRedundantInductionCasts(VPlan &Plan) { in removeRedundantInductionCasts()
331 void VPlanTransforms::removeRedundantCanonicalIVs(VPlan &Plan) { in removeRedundantCanonicalIVs()
364 void VPlanTransforms::removeDeadRecipes(VPlan &Plan) { in removeDeadRecipes()
381 void VPlanTransforms::optimizeInductions(VPlan &Plan, ScalarEvolution &SE) { in optimizeInductions()
417 void VPlanTransforms::removeRedundantExpandSCEVRecipes(VPlan &Plan) { in removeRedundantExpandSCEVRecipes()
H A DVPlan.cpp134 VPlan *VPBlockBase::getPlan() { return getPlanEntry(this)->Plan; } in getPlan()
153 void VPBlockBase::setPlan(VPlan *ParentPlan) { in setPlan()
571 VPActiveLaneMaskPHIRecipe *VPlan::getActiveLaneMaskPhi() { in getActiveLaneMaskPhi()
589 void VPlan::prepareToExecute(Value *TripCountV, Value *VectorTripCountV, in prepareToExecute()
666 void VPlan::execute(VPTransformState *State) { in execute()
747 void VPlan::print(raw_ostream &O) const { in print()
783 void VPlan::printDOT(raw_ostream &O) const { in printDOT()
789 void VPlan::dump() const { print(dbgs()); } in dump()
792 void VPlan::addLiveOut(PHINode *PN, VPValue *V) { in addLiveOut()
1062 VPInterleavedAccessInfo::VPInterleavedAccessInfo(VPlan &Plan, in VPInterleavedAccessInfo()
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H A DVPRecipeBuilder.h79 VPlan &Plan, VFRange &Range);
85 VFRange &Range, VPlan &Plan);
H A DVPlan.h63 class VPlan; variable
99 using VPlanPtr = std::unique_ptr<VPlan>;
366 VPlan *Plan;
405 VPlan *Plan = nullptr;
461 VPlan *getPlan();
462 const VPlan *getPlan() const;
466 void setPlan(VPlan *ParentPlan);
2498 class VPlan {
2547 ~VPlan() {
2745 const VPlan &Plan;
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H A DCMakeLists.txt8 VPlan.cpp
H A DVPlanValue.h432 class VPlan; variable
443 void assignSlots(const VPlan &Plan);
446 VPSlotTracker(const VPlan *Plan = nullptr) {
H A DVPlanHCFGBuilder.cpp43 VPlan &Plan;
73 PlainCFGBuilder(Loop *Lp, LoopInfo *LI, VPlan &P) in PlainCFGBuilder()
H A DLoopVectorizationPlanner.h306 VPlan &getBestPlanFor(ElementCount VF) const;
313 void executePlan(ElementCount VF, unsigned UF, VPlan &BestPlan,
/llvm-project-15.0.7/llvm/docs/Proposals/
H A DVectorizationPlan.rst27 VPlan-based vectorization involves three major steps, taking a "scenario-based
38 3. Execute Step: materialize the best VPlan. Note that this is the only step
48 The design of VPlan follows several high-level guidelines:
93 The low-level design of VPlan comprises of the following classes.
99 Once the best VPlan is determined, including the best VF and UF, this VPlan
102 :VPlan:
159 It is used to model the fact that recipes in VPlan can define multiple
164 VPlan-level instruction to be generated if the VPlan is executed, including
176 The Planning Process and VPlan Roadmap
184 VPlan-to-VPlan algorithms. Finally, VPlan will support the planning process
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dvplan_hcfg_stress_test.ll5 ; Verify that the stress testing flag for the VPlan H-CFG builder works as
6 ; expected with and without enabling the VPlan H-CFG Verifier.
8 ; VERIFIER: Verifying VPlan H-CFG.
9 ; NO-VERIFIER-NOT: Verifying VPlan H-CFG.
H A Dvplan-stress-test-no-explict-vf.ll4 ; This test checks that, when stress testing VPlan, if the computed VF
7 ; CHECK: LV: VPlan computed VF 1.
8 ; CHECK: LV: VPlan stress testing: overriding computed VF.
H A Dvplan-printing.ll11 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
57 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
108 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
153 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
197 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
276 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
342 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
392 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
486 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
535 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
H A Dvplan-sink-scalars-and-merge.ll13 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
80 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
159 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
240 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
315 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
416 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
532 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
642 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
757 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
825 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
[all …]
H A Dfirst-order-recurrence-sink-replicate-region.ll11 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
99 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
174 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
251 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
347 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
439 ; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
H A Dvplan-dot-printing.ll10 ; CHECK: digraph VPlan {
11 ; CHECK-NEXT: graph [labelloc=t, fontsize=30; label="Vectorization Plan\nInitial VPlan for VF=\{4\…
H A Dvplan-sink-scalars-and-merge-vf1.ll10 ; CHECK: VPlan 'Initial VPlan for VF={1},UF>=1' {
H A Dinterleave-and-scalarize-only.ll7 ; DBG: VPlan 'Initial VPlan for VF={1},UF>=1' {
176 ; DBG: VPlan 'Initial VPlan for VF={1},UF>=1' {
H A Dicmp-uniforms.ll39 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
/llvm-project-15.0.7/llvm/unittests/Transforms/Vectorize/
H A DVPlanTestBase.h67 auto Plan = std::make_unique<VPlan>(); in buildHCFG()
77 auto Plan = std::make_unique<VPlan>(); in buildPlainCFG()
H A DVPlanTest.cpp256 VPlan Plan; in TEST()
272 VPlan Plan; in TEST()
289 VPlan Plan; in TEST()
316 VPlan Plan; in TEST()
355 VPlan Plan; in TEST()
443 VPlan Plan; in TEST()
525 VPlan Plan; in TEST()
572 VPlan Plan; in TEST()
663 VPlan Plan; in TEST()
699 VPlan Plan; in TEST()
[all …]
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/
H A DBUILD.gn14 "VPlan.cpp",
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/
H A Dsve-tail-folding-forced.ll12 ; VPLANS: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF>=1' {

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