Searched refs:VPT (Results 1 – 11 of 11) sorted by relevance
| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | mve-vpt.s | 7 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: VPT predicated instructions must be in VPT block 10 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: VPT predicated instructions must be in VPT block 33 # ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: instruction in VPT block must be predicable 39 # VPT block. 48 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: VPT predicated instructions must be in VPT block
|
| H A D | mve-reductions-fp.s | 49 # VPT block.
|
| H A D | mve-vcmp.s | 283 # distinguished, in spite of VCMPE sometimes being a VPT-suffixed
|
| H A D | mve-float.s | 365 # VPT block.
|
| /llvm-project-15.0.7/libcxx/test/std/thread/futures/futures.task/futures.task.members/ |
| H A D | ctor1.fail.cpp | 25 typedef volatile std::packaged_task<A(int, char)> VPT; typedef 30 VPT init{}; in main()
|
| H A D | ctor2.compile.pass.cpp | 26 using VPT = volatile std::packaged_task<A(int, char)>; typedef 28 static_assert(!std::is_constructible<PT, std::allocator_arg_t, test_allocator<A>, VPT>::value, "");
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMLowOverheadLoops.cpp | 272 MachineInstr *VPT = Insts.front(); in hasImplicitlyValidVPT() local 273 assert(isVPTOpcode(VPT->getOpcode()) && in hasImplicitlyValidVPT() 276 if (VPT->getOpcode() == ARM::MVE_VPST) in hasImplicitlyValidVPT() 295 if (Def->getParent() == VPT->getParent()) in hasImplicitlyValidVPT() 302 return (IsOperandPredicated(VPT, 1) || IsOperandPredicated(VPT, 2)) && in hasImplicitlyValidVPT() 303 (IsOperandPredicated(VPT, 1) || IsOperandInvariant(VPT, 1)) && in hasImplicitlyValidVPT() 304 (IsOperandPredicated(VPT, 2) || IsOperandInvariant(VPT, 2)); in hasImplicitlyValidVPT()
|
| H A D | ARMInstrFormats.td | 200 // VPT predicate 212 // VPT-predicated MVE instruction. 219 // * ARMVCC::Then means it's in a VPT block and appears with the T suffix 220 // * ARMVCC::Else means it's in a VPT block and appears with the E suffix.
|
| H A D | ARMInstrMVE.td | 13 // VPT condition mask 21 // VPT/VCMP restricted predicate for sign invariant types 31 // VPT/VCMP restricted predicate for signed types 41 // VPT/VCMP restricted predicate for unsigned types 51 // VPT/VCMP restricted predicate for floating point 399 // of input operands that provides the VPT suffix (none, T or E) and 406 // VPT predication suffix goes before the dot, so the full 6167 // so they are VPT-predicable.
|
| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | O3-pipeline.ll | 106 ; CHECK-NEXT: MVE TailPred and VPT Optimisation Pass 169 ; CHECK-NEXT: MVE VPT block insertion pass
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/LowOverheadLoops/ |
| H A D | inloop-vpnot-3.mir | 4 # Test that a VPNOT is not added to a max sized VPT block.
|