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Searched refs:VCMP (Results 1 – 25 of 29) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp277 if (MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, TRI, NewOpcode)) { in InsertVPTBlocks() local
278 LLVM_DEBUG(dbgs() << " folding VCMP into VPST: "; VCMP->dump()); in InsertVPTBlocks()
281 MIBuilder.add(VCMP->getOperand(1)); in InsertVPTBlocks()
282 MIBuilder.add(VCMP->getOperand(2)); in InsertVPTBlocks()
283 MIBuilder.add(VCMP->getOperand(3)); in InsertVPTBlocks()
288 make_range(VCMP->getIterator(), MI->getIterator())) { in InsertVPTBlocks()
289 MII.clearRegisterKills(VCMP->getOperand(1).getReg(), TRI); in InsertVPTBlocks()
290 MII.clearRegisterKills(VCMP->getOperand(2).getReg(), TRI); in InsertVPTBlocks()
293 VCMP->eraseFromParent(); in InsertVPTBlocks()
H A DARMLowOverheadLoops.cpp1645 MachineInstr *VCMP = in ConvertVPTBlocks() local
1652 if (!VCMP) { in ConvertVPTBlocks()
1664 ReplaceVCMPWithVPT(VCMP, VCMP); in ConvertVPTBlocks()
1692 MachineInstr *VCMP = VprDef; in ConvertVPTBlocks() local
1698 if (std::none_of(++MachineBasicBlock::iterator(VCMP), in ConvertVPTBlocks()
1700 RDA->hasSameReachingDef(VCMP, VPST, VCMP->getOperand(1).getReg()) && in ConvertVPTBlocks()
1701 RDA->hasSameReachingDef(VCMP, VPST, VCMP->getOperand(2).getReg())) { in ConvertVPTBlocks()
1702 ReplaceVCMPWithVPT(VCMP, VPST); in ConvertVPTBlocks()
H A DARMScheduleM4.td130 def : M4UnitL1I<(instregex "VMOVS", "FCONSTS", "VCMP", "VNEG", "VABS")>;
H A DARMISelLowering.h147 VCMP, // Vector compare. enumerator
H A DARMScheduleM7.td425 // VCMP
H A DARMScheduleR52.td794 (instregex "(VCEQ|VCGE|VCGT|VCLE|VCLT|VCLZ|VCMP|VCMPE|VCNT)")>;
H A DARMScheduleSwift.td605 (instregex "VCMP(D|S|ZD|ZS)$", "VCMPE(D|S|ZD|ZS)")>;
H A DARMISelLowering.cpp1732 MAKE_CASE(ARMISD::VCMP) in getTargetNodeName()
6761 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6763 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6773 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6775 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6848 Result = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
14424 if (N->getOpcode() == ARMISD::VCMP) in getVCMPCondCode()
14447 if (V->getOpcode() == ARMISD::VCMP || V->getOpcode() == ARMISD::VCMPZ) in PerformORCombine_i1()
14594 if (N0->getOpcode() == ARMISD::VCMP) in PerformXORCombine()
15220 return DAG.getNode(ARMISD::VCMP, dl, VT, Op1, Op0, in PerformVCMPCombine()
[all …]
H A DARMScheduleA57.td730 (instregex "VCMP(D|S|H|ZD|ZS|ZH)$", "VCMPE(D|S|H|ZD|ZS|ZH)")>;
H A DARMInstrMVE.td21 // VPT/VCMP restricted predicate for sign invariant types
31 // VPT/VCMP restricted predicate for signed types
41 // VPT/VCMP restricted predicate for unsigned types
51 // VPT/VCMP restricted predicate for floating point
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Datomic_cmp_swap_local.ll14 ; GCN-DAG: v_mov_b32_e32 [[VCMP:v[0-9]+]], 7
17 ; GCN: ds_cmpst_rtn_b32 [[RESULT:v[0-9]+]], [[VPTR]], [[VCMP]], [[VSWAP]] offset:16
76 ; GCN-DAG: v_mov_b32_e32 [[VCMP:v[0-9]+]], 7
79 ; GCN: ds_cmpst_b32 [[VPTR]], [[VCMP]], [[VSWAP]] offset:16
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrAltivec.td787 class VCMP<bits<10> xo, string asmstr, ValueType Ty>
800 def VCMPBFP : VCMP <966, "vcmpbfp $vD, $vA, $vB" , v4f32>;
802 def VCMPEQFP : VCMP <198, "vcmpeqfp $vD, $vA, $vB" , v4f32>;
804 def VCMPGEFP : VCMP <454, "vcmpgefp $vD, $vA, $vB" , v4f32>;
806 def VCMPGTFP : VCMP <710, "vcmpgtfp $vD, $vA, $vB" , v4f32>;
810 def VCMPEQUB : VCMP < 6, "vcmpequb $vD, $vA, $vB" , v16i8>;
812 def VCMPGTSB : VCMP <774, "vcmpgtsb $vD, $vA, $vB" , v16i8>;
814 def VCMPGTUB : VCMP <518, "vcmpgtub $vD, $vA, $vB" , v16i8>;
818 def VCMPEQUH : VCMP < 70, "vcmpequh $vD, $vA, $vB" , v8i16>;
820 def VCMPGTSH : VCMP <838, "vcmpgtsh $vD, $vA, $vB" , v8i16>;
[all …]
H A DREADME_P9.txt9 . Same as other VCMP*, use VCMP/VCMPo form (support intrinsic)
H A DPPCISelLowering.h279 VCMP, enumerator
H A DPPCInstrP10.td1780 def VCMPEQUQ : VCMP <455, "vcmpequq $vD, $vA, $vB" , v1i128>;
1781 def VCMPGTSQ : VCMP <903, "vcmpgtsq $vD, $vA, $vB" , v1i128>;
1782 def VCMPGTUQ : VCMP <647, "vcmpgtuq $vD, $vA, $vB" , v1i128>;
H A DP9InstrResources.td216 (instregex "VCMP(EQ|GE|GT)FP(_rec)?$"),
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dmve-vpt-block-kill.mir4 # Check we remove kill flags when combining VCMP into a VPST
H A Dmve-vpt-optimisations.mir243 ; There shouldn't be any exception for $zr, so the second VCMP should
415 ; Tests that, if the result of the VCMP is killed before the
416 ; second VCMP (that will be converted into a VPNOT) is found,
426 ; Tests that, if the result of the VCMP that has been replaced with a
597 ; Tests that a "VPNOT-like VCMP" with an opcode different from the previous VCMP
627 ; Tests that a VCMP is not transformed into a VPNOT if its CondCode is not
647 ; Tests that a "VPNOT-like VCMP" will not be transformed into a VPNOT if
949 ; Tests that the first VPNOT is moved down when the result of the VCMP is used
/llvm-project-15.0.7/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvcmp.ll6 ;;; We test VCMP*vvl, VCMP*vvl_v, VCMP*rvl, VCMP*rvl_v, VCMP*ivl, VCMP*ivl_v,
7 ;;; VCMP*vvml_v, VCMP*rvml_v, VCMP*ivml_v, PVCMP*vvl, PVCMP*vvl_v, PVCMP*rvl,
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
H A Div-two-vcmp-reordered.mir4 # TODO: We should be able to handle the VCMP -> VPST -> VCMP -> VCTP case.
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dmve-vcmp.s282 # Ensure the scalar FP instructions VCMP and VCMPE are still correctly
284 # version of VCMP with identical encoding.
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86SchedSkylakeServer.td851 "VCMP(SD|SS)Zrr",
1725 def: InstRW<[SKXWriteResGroup136_2], (instregex "VCMP(PD|PS)Z128rm(b?)i",
1726 "VCMP(SD|SS)Zrm",
H A DX86SchedIceLake.td869 "VCMP(SD|SS)Zrr",
1744 def: InstRW<[ICXWriteResGroup136_2], (instregex "VCMP(PD|PS)Z128rm(b?)i",
1745 "VCMP(SD|SS)Zrm",
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dfp16-instructions.ll104 ; 3. VCMP
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrVec.td920 // Section 8.10.14 - VCMP (Vector Compare)

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