Searched refs:UnitIdx (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | RegisterInfoEmitter.cpp | 236 for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); in EmitRegUnitPressure() local
237 UnitIdx < UnitEnd; ++UnitIdx) { in EmitRegUnitPressure()
238 if (RegBank.getRegUnit(UnitIdx).Weight > 1) in EmitRegUnitPressure()
248 for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); in EmitRegUnitPressure() local
249 UnitIdx < UnitEnd; ++UnitIdx) { in EmitRegUnitPressure()
250 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure()
345 for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); in EmitRegUnitPressure() local
346 UnitIdx < UnitEnd; ++UnitIdx) { in EmitRegUnitPressure()
347 OS << PSetsSeqs.get(PSets[RegBank.getRegUnit(UnitIdx).RegClassUnitSetsIdx]) in EmitRegUnitPressure()
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| H A D | CodeGenRegisters.cpp | 2081 for (unsigned UnitIdx = 0, UnitEnd = NumNativeRegUnits; in computeRegUnitSets() local
2082 UnitIdx < UnitEnd; ++UnitIdx) { in computeRegUnitSets()
2086 if (!is_contained(RUSet.Units, UnitIdx)) in computeRegUnitSets()
2097 RegUnits[UnitIdx].RegClassUnitSetsIdx = RCUnitSetsIdx; in computeRegUnitSets()
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| /llvm-project-15.0.7/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFVerifier.cpp | 369 uint64_t Offset = 0, UnitIdx = 0; in verifyUnitSection() local
381 if (!verifyUnitHeader(DebugInfoData, &Offset, UnitIdx, UnitType, in verifyUnitSection()
388 ++UnitIdx; in verifyUnitSection()
390 if (UnitIdx == 0 && !hasDIE) { in verifyUnitSection()
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