| /llvm-project-15.0.7/clang-tools-extra/clangd/ |
| H A D | Format.cpp | 161 StringRef Trailing = firstLine(Code.substr(Cursor)); in getIncrementalChangesAfterNewline() local
169 StringRef NextLine = firstLine(Code.substr(Cursor + Trailing.size() + 1)); in getIncrementalChangesAfterNewline()
172 StringRef TrailingTrim = Trailing.ltrim(); in getIncrementalChangesAfterNewline()
173 if (unsigned TrailWS = Trailing.size() - TrailingTrim.size()) in getIncrementalChangesAfterNewline()
175 replacement(Code, StringRef(Trailing.begin(), TrailWS), ""))); in getIncrementalChangesAfterNewline()
201 Trailing.startswith("}")) { in getIncrementalChangesAfterNewline()
203 Result.Changes.add(replacement(Code, Trailing.take_front(1), "\n}"))); in getIncrementalChangesAfterNewline()
206 tooling::Range(Trailing.data() - Code.data() + 1, 1)); in getIncrementalChangesAfterNewline()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 865 unsigned Trailing = countTrailingZeros(C1); in Select() local
876 CurDAG->getTargetConstant(C2 + Trailing, DL, VT)); in Select()
888 CurDAG->getTargetConstant(C2 + Trailing, DL, VT)); in Select()
901 unsigned Trailing = countTrailingZeros(C1); in Select() local
2050 unsigned Trailing = countTrailingZeros(Mask); in selectSHXADDOp() local
2051 if (LeftShift && Leading == 0 && C2 < Trailing && Trailing == ShAmt) { in selectSHXADDOp()
2088 unsigned Trailing = countTrailingZeros(Mask); in selectSHXADDOp() local
2091 if (LeftShift && Leading == 32 && Trailing > 0 && in selectSHXADDOp()
2092 (Trailing + C1) == ShAmt) { in selectSHXADDOp()
2103 if (!LeftShift && Leading == 32 && Trailing > C1 && in selectSHXADDOp()
[all …]
|
| /llvm-project-15.0.7/llvm/test/Assembler/ |
| H A D | invalid-datalayout6.ll | 3 ; CHECK: Trailing separator in datalayout string
|
| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/readability/ |
| H A D | convert-member-functions-to-static.cpp | 140 struct Trailing { struct
|
| /llvm-project-15.0.7/llvm/test/tools/llvm-dwarfdump/X86/Inputs/ |
| H A D | debug_line_reserved_length.s | 32 # Trailing good section
|
| H A D | debug_line_malformed.s | 471 # Trailing good section.
|
| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | p10-constants.ll | 237 ; Leading Zeros + Following Ones + Trailing Zeros > 30
249 ; Leading Zeros + Trailing Ones > 30
260 ; Leading Zeros + Trailing Ones + Following Zeros > 30
|
| /llvm-project-15.0.7/mlir/test/Dialect/Quant/ |
| H A D | parse-uniform.mlir | 14 // Trailing whitespace.
|
| /llvm-project-15.0.7/libcxx/docs/DesignDocs/ |
| H A D | ExtendedCXX03Support.rst | 36 * Trailing return types.
|
| /llvm-project-15.0.7/flang/lib/Optimizer/CodeGen/ |
| H A D | TargetRewrite.cpp | 46 Trailing, enumerator
524 fixups.emplace_back(FixupTy::Codes::Trailing, in convertSignature()
674 case FixupTy::Codes::Trailing: { in convertSignature()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | README_P9.txt | 38 - Vector Count Leading/Trailing Zero LSB. Result is placed into GPR[rD]:
44 - Vector Count Trailing Zeros: vctzb vctzh vctzw vctzd
|
| H A D | PPCInstrAltivec.td | 1482 // Vector Count Leading/Trailing Zero LSB. Result is placed into GPR[rD]
1491 // Vector Count Trailing Zeros
|
| /llvm-project-15.0.7/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 112 Stripping Leading/Trailing Zeros in Bit Vectors
195 those sub-hierarchies need to be (see "Stripping Leading/Trailing Zeros in Bit
|
| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | IntrinsicsPowerPC.td | 93 // Count Leading / Trailing Zeroes under bit Mask Builtins.
1051 // P10 Vector Count Leading / Trailing Zeroes under bit Mask Builtins.
|
| /llvm-project-15.0.7/llvm/test/MC/PowerPC/ |
| H A D | ppc64-encoding-vmx.s | 844 # Vector Count Trailing Zeros
|
| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | BuiltinsPPC.def | 552 // P10 Vector Count Leading / Trailing Zeroes under bit Mask built-ins.
|
| /llvm-project-15.0.7/llvm/docs/ |
| H A D | GetElementPtr.rst | 521 #. Trailing zero indices are superfluous for pointer aliasing, but not for the
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86Schedule.td | 176 defm WriteTZCNT : X86SchedWritePair; // Trailing zero count.
|
| H A D | X86ScheduleZnver3.td | 719 defm : Zn3WriteResIntPair<WriteTZCNT, [Zn3ALU12], 2, [1], 2>; // Trailing zero count.
|
| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 821 // Count Trailing Zeros (TRAILZ)
|
| /llvm-project-15.0.7/mlir/docs/Bindings/ |
| H A D | Python.md | 978 * Trailing usage-specific, optional keyword arguments:
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEInstrVec.td | 1512 // Section 8.17.12 - TOVM (Trailing One of VM)
|
| /llvm-project-15.0.7/mlir/test/lib/Dialect/Test/ |
| H A D | TestOps.td | 1645 // Test Patterns (Trailing Directives)
|
| /llvm-project-15.0.7/llvm/test/Transforms/SROA/ |
| H A D | basictest.ll | 307 ; Trailing past the second overlap.
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 14141 uint32_t Trailing = countTrailingZeros(C1); in CombineANDShift() local
14143 if (Trailing == C2 && C2 + C3 < 32) { in CombineANDShift()
|