| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | RegionInfoImpl.h | 41 template <class Tr> 47 template <class Tr> 54 template <class Tr> 59 template <class Tr> 65 template <class Tr> 83 template <class Tr> 101 template <class Tr> 118 template <class Tr> 140 template <class Tr> 152 template <class Tr> [all …]
|
| H A D | RegionInfo.h | 116 template <class Tr> 118 friend class RegionBase<Tr>; 121 using BlockT = typename Tr::BlockT; 253 template <class Tr> 255 friend class RegionInfoBase<Tr>; 257 using FuncT = typename Tr::FuncT; 263 using LoopT = typename Tr::LoopT; 265 using InstT = typename Tr::InstT; 664 template <class Tr> 673 template <class Tr> [all …]
|
| /llvm-project-15.0.7/clang/unittests/CodeGen/ |
| H A D | TestCompiler.h | 41 llvm::Triple Tr(TrStr); 42 Tr.setOS(Triple::Linux); 43 Tr.setVendor(Triple::VendorType::UnknownVendor); 44 Tr.setEnvironment(Triple::EnvironmentType::UnknownEnvironment); 45 compiler.getTargetOpts().Triple = Tr.getTriple();
|
| /llvm-project-15.0.7/clang/test/SemaTemplate/ |
| H A D | friend-template.cpp | 164 template <typename Ch, typename Tr, typename B> void op(X2<Ch, Tr>& , B) in op() argument 166 X2<int, Tr> s; in op() 196 template <typename Ch, typename Tr, typename B> void op(X2<Ch, Tr>& , B) in op() argument 198 X2<int, Tr> s; in op()
|
| /llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/AArch64/ |
| H A D | trunc-weird-user.ll | 22 %Tr = trunc i32 %as to i1 23 br i1 %Tr, label %BB2, label %BB3 31 %p = select i1 %Tr, i64* %p1, i64* %p2
|
| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | fold-vector-bv-crash.ll | 13 %Tr = trunc <4 x i64> %I to <4 x i8> 14 %Bc = bitcast <4 x i8> %Tr to i32
|
| H A D | pr42909.ll | 14 %Tr = trunc <4 x i16> %I8 to <4 x i1> 15 …%Shuff28 = shufflevector <4 x i1> zeroinitializer, <4 x i1> %Tr, <4 x i32> <i32 undef, i32 3, i32 …
|
| H A D | fold-vector-shuffle-crash.ll | 9 %Tr = trunc <8 x i64> zeroinitializer to <8 x i32> 10 …%Shuff20 = shufflevector <8 x i32> %Shuff7, <8 x i32> %Tr, <8 x i32> <i32 13, i32 15, i32 1, i32 3… 31 %Tr = trunc <8 x i64> %I to <8 x i16> 39 %B9 = mul <8 x i16> %Tr, %Tr 56 %I22 = insertelement <8 x i16> %Tr, i16 18460, i32 6 185 %Cmp117 = icmp ult <8 x i16> %Tr, %Tr115 203 %Cmp133 = icmp sge <8 x i16> %Tr, %Tr115 211 %Sl139 = select i1 %E43, <8 x i16> %Tr, <8 x i16> %Tr115
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineTraceMetrics.h | 422 const MachineTraceMetrics::Trace &Tr) { 423 Tr.print(OS);
|
| H A D | SwitchLoweringUtils.h | 201 BitTestCase(uint64_t M, MachineBasicBlock *T, MachineBasicBlock *Tr, in BitTestCase() 203 : Mask(M), ThisBB(T), TargetBB(Tr), ExtraProb(Prob) {} in BitTestCase()
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/msa/ |
| H A D | llvm-stress-s2704903805.ll | 46 %Tr = trunc i32 272597 to i1 47 br i1 %Tr, label %CF, label %CF80 121 %Sl67 = select i1 %Tr, <1 x i8> %Shuff, <1 x i8> %I23
|
| H A D | llvm-stress-s1704963983.ll | 42 %Tr = trunc <8 x i64> %Shuff to <8 x i32> 65 %B30 = urem <8 x i32> %Tr, zeroinitializer 81 %B44 = urem <8 x i32> %B30, %Tr
|
| H A D | llvm-stress-s1935737938.ll | 59 %Tr = trunc i64 286689 to i8 91 %Cmp52 = icmp ne i8 %Tr, %Sl24
|
| H A D | llvm-stress-s3926023935.ll | 60 %Tr = trunc i8 %L5 to i1 100 %Sl53 = select i1 %Tr, i1 %Cmp46, i1 %Cmp10
|
| H A D | llvm-stress-s997348632.ll | 39 %Tr = trunc i32 376034 to i16
|
| H A D | llvm-stress-s525530439.ll | 109 %Tr = trunc <1 x i64> %Shuff13 to <1 x i16>
|
| H A D | llvm-stress-s3861334421.ll | 89 %Tr = trunc <4 x i64> %I14 to <4 x i32>
|
| H A D | llvm-stress-s3997499501.ll | 22 %Tr = trunc <1 x i64> zeroinitializer to <1 x i8>
|
| /llvm-project-15.0.7/clang/include/clang/AST/ |
| H A D | CommentHTMLTags.td | 51 def Tr : Tag<"tr"> { let EndTagOptional = 1; }
|
| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | splitMove_undefReg_mverifier.ll | 23 %Tr = trunc i64 -1 to i32 267 store i32 %Tr, i32* %Sl117 364 store i32 %Tr, i32* %PC78 399 store i32 %Tr, i32* %PC78
|
| H A D | splitMove_undefReg_mverifier_2.ll | 20 %Tr = trunc <8 x i16> zeroinitializer to <8 x i1> 97 %Sl118 = select i1 %Cmp81, <8 x i1> undef, <8 x i1> %Tr
|
| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 395 Value *Tr = Builder.CreateTrunc(X, CmpInst::makeCmpResultType(Ty)); in visitMul() local 396 return SelectInst::Create(Tr, Y, ConstantInt::getNullValue(Ty)); in visitMul()
|
| /llvm-project-15.0.7/libcxx/include/ |
| H A D | locale | 121 template <class Codecvt, class Elem = wchar_t, class Tr = char_traits<Elem>> 123 : public basic_streambuf<Elem, Tr> 126 typedef typename Tr::state_type state_type;
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA57.td | 484 def : InstRW<[A57Write_4cyc_1L_1I, A57WrBackTwo], (instregex "LDR(SB|H|SH)Tr")>;
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 2798 SDValue Tr = DAG.getNode(MipsISD::TruncIntFP, SDLoc(Val), FPTy, in lowerFP_TO_SINT_STORE() local 2800 return DAG.getStore(SD->getChain(), SDLoc(SD), Tr, SD->getBasePtr(), in lowerFP_TO_SINT_STORE()
|