| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetSubtargetInfo.cpp | 17 TargetSubtargetInfo::TargetSubtargetInfo( in TargetSubtargetInfo() function in TargetSubtargetInfo 25 TargetSubtargetInfo::~TargetSubtargetInfo() = default; 27 bool TargetSubtargetInfo::enableAtomicExpand() const { in enableAtomicExpand() 31 bool TargetSubtargetInfo::enableIndirectBrExpand() const { in enableIndirectBrExpand() 35 bool TargetSubtargetInfo::enableMachineScheduler() const { in enableMachineScheduler() 39 bool TargetSubtargetInfo::enableJoinGlobalCopies() const { in enableJoinGlobalCopies() 43 bool TargetSubtargetInfo::enableRALocalReassignment( in enableRALocalReassignment() 48 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() 52 bool TargetSubtargetInfo::enablePostRAMachineScheduler() const { in enablePostRAMachineScheduler() 56 bool TargetSubtargetInfo::useAA() const { in useAA() [all …]
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| H A D | PostRASchedulerList.cpp | 105 TargetSubtargetInfo::AntiDepBreakMode &Mode, 146 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, 205 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, in SchedulePostRATDList() 216 assert((AntiDepMode == TargetSubtargetInfo::ANTIDEP_NONE || in SchedulePostRATDList() 263 const TargetSubtargetInfo &ST, in enablePostRAScheduler() 265 TargetSubtargetInfo::AntiDepBreakMode &Mode, in enablePostRAScheduler() 289 TargetSubtargetInfo::AntiDepBreakMode AntiDepMode = in runOnMachineFunction() 290 TargetSubtargetInfo::ANTIDEP_NONE; in runOnMachineFunction() 302 ? TargetSubtargetInfo::ANTIDEP_ALL in runOnMachineFunction() 304 ? TargetSubtargetInfo::ANTIDEP_CRITICAL in runOnMachineFunction() [all …]
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| H A D | RegisterUsageInfo.cpp | 90 = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first)) in print()
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| H A D | MachineCycleAnalysis.cpp | 93 const TargetSubtargetInfo &ST = MF->getSubtarget(); in isCycleInvariant()
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| H A D | AggressiveAntiDepBreaker.h | 134 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetSubtargetInfo.h | 60 class TargetSubtargetInfo : public MCSubtargetInfo { 62 TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, 76 TargetSubtargetInfo() = delete; 77 TargetSubtargetInfo(const TargetSubtargetInfo &) = delete; 78 TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete; 79 ~TargetSubtargetInfo() override;
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| H A D | TargetSchedule.h | 35 const TargetSubtargetInfo *STI = nullptr; 56 void init(const TargetSubtargetInfo *TSInfo); 62 const TargetSubtargetInfo *getSubtargetInfo() const { return STI; } in getSubtargetInfo()
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| H A D | MacroFusion.h | 25 class TargetSubtargetInfo; variable 33 const TargetSubtargetInfo &TSI,
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| H A D | VLIWMachineScheduler.h | 29 class TargetSubtargetInfo; variable 50 VLIWResourceModel(const TargetSubtargetInfo &STI, const TargetSchedModel *SM); 64 virtual DFAPacketizer *createPacketizer(const TargetSubtargetInfo &STI) const; 241 createVLIWResourceModel(const TargetSubtargetInfo &STI,
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| H A D | AntiDepBreaker.h | 96 TargetSubtargetInfo::RegClassVector &CriticalPathRCs);
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| H A D | ModuloSchedule.h | 171 const TargetSubtargetInfo &ST; 296 const TargetSubtargetInfo &ST;
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/MIRParser/ |
| H A D | MIParser.h | 35 class TargetSubtargetInfo; variable 55 const TargetSubtargetInfo &Subtarget; 151 PerTargetMIParsingState(const TargetSubtargetInfo &STI) in PerTargetMIParsingState() 159 void setTarget(const TargetSubtargetInfo &NewSubtarget);
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetMachine.h | 46 const TargetSubtargetInfo *getSubtargetImpl() const; 47 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0; 87 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
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| H A D | AMDGPUMCInstLower.h | 31 const TargetSubtargetInfo &ST; 35 AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
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| H A D | AMDGPUMacroFusion.cpp | 27 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
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| H A D | R600TargetMachine.h | 39 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
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| H A D | AMDGPUTargetTransformInfo.h | 42 const TargetSubtargetInfo *ST; 45 const TargetSubtargetInfo *getST() const { return ST; } in getST()
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | MFCommon.inc | 72 class BogusSubtarget : public TargetSubtargetInfo { 75 : TargetSubtargetInfo(Triple(""), "", "", "", {}, {}, nullptr, nullptr, 111 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override { 131 const TargetSubtargetInfo &STI = *TM->getSubtargetImpl(*F);
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonMachineScheduler.h | 34 createVLIWResourceModel(const TargetSubtargetInfo &STI,
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| H A D | HexagonMachineScheduler.cpp | 41 const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const { in createVLIWResourceModel()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVTargetTransformInfo.h | 33 const TargetSubtargetInfo *getST() const { return ST; } in getST()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVMacroFusion.cpp | 54 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMMacroFusion.cpp | 52 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86MacroFusion.cpp | 36 const TargetSubtargetInfo &TSI, in shouldScheduleAdjacent()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetMachine.h | 59 class TargetSubtargetInfo; variable 133 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const { in getSubtargetImpl()
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