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Searched refs:TSchedModel (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineCombiner.cpp77 TargetSchedModel TSchedModel; member in __anonec91dd480111::MachineCombiner
212 assert(TSchedModel.hasInstrSchedModelOrItineraries() && in getDepth()
246 LatencyOp = TSchedModel.computeOperandLatency( in getDepth()
270 assert(TSchedModel.hasInstrSchedModelOrItineraries() && in getLatency()
290 LatencyOp = TSchedModel.computeOperandLatency( in getLatency()
294 LatencyOp = TSchedModel.computeInstrLatency(NewRoot); in getLatency()
348 RootLatency += TSchedModel.computeInstrLatency(I); in getLatenciesForInstrSequences()
378 assert(TSchedModel.hasInstrSchedModelOrItineraries() && in improvesCriticalPathLen()
445 if (!TSchedModel.hasInstrSchedModel()) in preservesResourceLen()
489 if (!TSchedModel.hasInstrSchedModelOrItineraries()) in doSubstitute()
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H A DSelectOptimize.cpp110 TargetSchedModel TSchedModel; member in __anon6edd6fd50111::SelectOptimize
251 TSchedModel.init(TSI); in runOnFunction()
934 uint64_t MispredictPenalty = TSchedModel.getMCSchedModel()->MispredictPenalty; in getMispredictionCost()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUIGroupLP.cpp261 const TargetSchedModel *TSchedModel = DAGInstrs->getSchedModel(); in apply() local
262 if (!TSchedModel || DAG->SUnits.empty()) in apply()
294 const TargetSchedModel *TSchedModel = DAGInstrs->getSchedModel(); in apply() local
295 if (!TSchedModel || DAGInstrs->SUnits.empty()) in apply()
H A DGCNHazardRecognizer.cpp63 TSchedModel.init(&ST); in GCNHazardRecognizer()
269 const MCSchedClassDesc *SC = TSchedModel.resolveSchedClass(&MI); in getMFMAPipelineWaitStates()
270 assert(TSchedModel.getWriteProcResBegin(SC) != in getMFMAPipelineWaitStates()
271 TSchedModel.getWriteProcResEnd(SC)); in getMFMAPipelineWaitStates()
272 return TSchedModel.getWriteProcResBegin(SC)->Cycles; in getMFMAPipelineWaitStates()
2095 TSchedModel.computeInstrLatency(MI1) == 2) in checkMAIHazards90A()
2114 switch (TSchedModel.computeInstrLatency(MI1)) { in checkMAIHazards90A()
2164 switch (TSchedModel.computeInstrLatency(MI1)) { in checkMAIHazards90A()
2445 switch (TSchedModel.computeInstrLatency(MFMA)) { in checkMAIVALUHazards()
2511 unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()
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H A DGCNHazardRecognizer.h49 TargetSchedModel TSchedModel; variable
H A DAMDGPUSubtarget.cpp901 const TargetSchedModel *TSchedModel = DAGInstrs->getSchedModel(); in apply() local
902 if (!TSchedModel || DAG->SUnits.empty()) in apply()
919 unsigned Lat = TSchedModel->computeInstrLatency(&MAI) - 1; in apply()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86CmovConversion.cpp124 TargetSchedModel TSchedModel; member in __anon121b794c0111::X86CmovConverterPass
179 TSchedModel.init(&STI); in runOnMachineFunction()
475 unsigned Latency = TSchedModel.computeInstrLatency(&MI); in checkForProfitableCmovCandidates()
540 unsigned MispredictPenalty = TSchedModel.getMCSchedModel()->MispredictPenalty; in checkForProfitableCmovCandidates()