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Searched refs:TF (Results 1 – 25 of 59) sorted by relevance

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/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/
H A Dsve-tail-folding-option.ll21 ; CHECK-TF-NORED: vector.ph:
37 ; CHECK-TF: vector.ph:
40 ; CHECK-TF: vector.body:
95 ; CHECK-TF: vector.body:
101 ; CHECK-TF: middle.block:
145 ; CHECK-TF-NORED: entry:
158 ; CHECK-TF-NOREC: entry:
170 ; CHECK-TF-LABEL: @add_recur
171 ; CHECK-TF: entry:
173 ; CHECK-TF: vector.ph:
[all …]
H A Dscalable-strict-fadd.ll25 ; CHECK-ORDERED-TF: vector.body:
31 ; CHECK-ORDERED-TF: for.end
107 ; CHECK-ORDERED-TF: for.end
182 ; CHECK-ORDERED-TF: entry
186 ; CHECK-ORDERED-TF: vector.ph
299 ; CHECK-ORDERED-TF: for.end
392 ; CHECK-ORDERED-TF: if.then
394 ; CHECK-ORDERED-TF: for.inc
397 ; CHECK-ORDERED-TF: for.end
555 ; CHECK-ORDERED-TF: for.end
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/RISCV/
H A Duniform-load-store.ll95 ; TF-SCALABLE-NEXT: entry:
134 ; TF-SCALABLE: for.end:
138 ; TF-FIXEDLEN-NEXT: entry:
272 ; TF-SCALABLE-NEXT: entry:
287 ; TF-FIXEDLEN-NEXT: entry:
416 ; TF-SCALABLE-NEXT: entry:
425 ; TF-SCALABLE: latch:
436 ; TF-FIXEDLEN-NEXT: entry:
470 ; TF-FIXEDLEN: latch:
586 ; TF-SCALABLE-NEXT: entry:
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp302 assert(TF == SparcMCExpr::VK_Sparc_None && in printOperand()
305 assert((TF == SparcMCExpr::VK_Sparc_HI in printOperand()
306 || TF == SparcMCExpr::VK_Sparc_H44 in printOperand()
307 || TF == SparcMCExpr::VK_Sparc_HH in printOperand()
308 || TF == SparcMCExpr::VK_Sparc_LM in printOperand()
316 assert((TF == SparcMCExpr::VK_Sparc_None in printOperand()
321 assert((TF == SparcMCExpr::VK_Sparc_TLS_GD_ADD in printOperand()
337 assert((TF == SparcMCExpr::VK_Sparc_LO in printOperand()
338 || TF == SparcMCExpr::VK_Sparc_M44 in printOperand()
339 || TF == SparcMCExpr::VK_Sparc_L44 in printOperand()
[all …]
H A DSparcISelLowering.h172 SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const;
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Daddress-selection.ll25 ; MIPS: t[[A:[0-9]+]]: i32 = LUi TargetGlobalAddress:i32<i32* @x> 0 [TF=4]
26 ; MIPS: t{{.*}}: i32 = ADDiu t[[A]], TargetGlobalAddress:i32<i32* @x> 0 [TF=5]
29 ; MIPS-XGOT: t[[B:[0-9]+]]: i32 = LUi TargetGlobalAddress:i32<i32* @x> 0 [TF=20]
31 … i32,ch = LW<Mem:(load (s32) from got)> t[[C]], TargetGlobalAddress:i32<i32* @x> 0 [TF=21], t{{.*}}
34 ; MM: t[[A:[0-9]+]]: i32 = LUi_MM TargetGlobalAddress:i32<i32* @x> 0 [TF=4]
35 ; MM: t{{.*}}: i32 = ADDiu_MM t[[A]], TargetGlobalAddress:i32<i32* @x> 0 [TF=5]
38 ; MM-XGOT: t[[B:[0-9]+]]: i32 = LUi_MM TargetGlobalAddress:i32<i32* @x> 0 [TF=20]
40 …}: i32,ch = LW_MM<Mem:(load (s32) from got)> t[[C]], TargetGlobalAddress:i32<i32* @x> 0 [TF=21], t0
/llvm-project-15.0.7/clang/test/CXX/special/class.dtor/
H A Dp3-0x.cpp97 struct TF { struct
99 ~TF(); argument
102 TF<T>::~TF() noexcept(false) {} in ~TF()
121 TF<int> f; in tinst()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRMCInstLower.cpp28 unsigned char TF = MO.getTargetFlags(); in lowerSymbolOperand() local
32 if (TF & AVRII::MO_NEG) { in lowerSymbolOperand()
43 if (TF & AVRII::MO_LO) { in lowerSymbolOperand()
50 } else if (TF & AVRII::MO_HI) { in lowerSymbolOperand()
57 } else if (TF != 0) { in lowerSymbolOperand()
H A DAVRExpandPseudoInsts.cpp316 unsigned TF = MI.getOperand(2).getTargetFlags(); in expand() local
571 unsigned TF = MI.getOperand(1).getTargetFlags(); in expand() local
573 MIBLO.addGlobalAddress(GV, Offs, TF | AVRII::MO_LO); in expand()
574 MIBHI.addGlobalAddress(GV, Offs, TF | AVRII::MO_HI); in expand()
579 unsigned TF = MI.getOperand(1).getTargetFlags(); in expand() local
622 unsigned TF = MI.getOperand(1).getTargetFlags(); in expand() local
624 MIBLO.addGlobalAddress(GV, Offs, TF); in expand()
625 MIBHI.addGlobalAddress(GV, Offs + 1, TF); in expand()
1032 unsigned TF = MI.getOperand(0).getTargetFlags(); in expand() local
1034 MIBLO.addGlobalAddress(GV, Offs, TF); in expand()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ARM/
H A Dtail-folding-counting-down.ll60 ; CHECK-TF: masked.load
61 ; CHECK-TF: masked.load
62 ; CHECK-TF: masked.store
92 ; CHECK-TF: masked.load
93 ; CHECK-TF: masked.load
94 ; CHECK-TF: masked.store
125 ; CHECK-TF: masked.load
126 ; CHECK-TF: masked.load
127 ; CHECK-TF: masked.store
190 ; CHECK-TF: masked.load
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp647 if (unsigned int TF = GADN->getTargetFlags()) in print_details() local
648 OS << " [TF=" << TF << ']'; in print_details()
654 OS << " [TF=" << TF << ']'; in print_details()
665 if (unsigned int TF = CP->getTargetFlags()) in print_details() local
666 OS << " [TF=" << TF << ']'; in print_details()
669 if (unsigned TF = TI->getTargetFlags()) in print_details() local
670 OS << " [TF=" << TF << ']'; in print_details()
683 if (unsigned int TF = ES->getTargetFlags()) in print_details() local
684 OS << " [TF=" << TF << ']'; in print_details()
815 if (unsigned int TF = BA->getTargetFlags()) in print_details() local
[all …]
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Dgnu-exceptions.m9 // CHECK: define{{.*}} void @test0() [[TF:#[0-9]+]]
35 // CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }
/llvm-project-15.0.7/mlir/docs/Rationale/
H A DMLIRForGraphAlgorithms.md48 graphs, TF-Lite's flat buffer format, TensorFlow's Graph format, the ONNX
78 1. the TF Lite TOCO translator, which we need to improve error
80 1. the TF/XLA bridge which needs to improve usability by merging some of its
89 TF Lite is mostly a subset of the larger work to support the functionality of
90 the TF/XLA bridge. TF Lite and the TF/XLA bridge include several compiler passes
134 Dialects (e.g. TF Graph, TF Lite flat buffer, XLA HLO, etc).
197 (e.g. TF Lite when an unsupported op is used) and it is important to be able to
292 effort moves beyond TF Lite / TOCO support. The discussions that are happening
344 they are a TF-Lite system or a client that is completely unrelated to
368 and would provide a path to migrating TF 1.x graphs forward into the TF 2.x
[all …]
/llvm-project-15.0.7/clang/test/Sema/
H A Dattr-mode.c92 typedef float f128ibm __attribute__ ((mode (TF)));
94 typedef float f128ibm __attribute__ ((mode (TF)));
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp200 unsigned TF = MO.getTargetFlags(); in PrintSymbolOperand() local
201 if (TF & ARMII::MO_LO16) in PrintSymbolOperand()
203 else if (TF & ARMII::MO_HI16) in PrintSymbolOperand()
229 unsigned TF = MO.getTargetFlags(); in printOperand() local
230 if (TF == ARMII::MO_LO16) in printOperand()
232 else if (TF == ARMII::MO_HI16) in printOperand()
941 MCSym = GetARMGVSymbol(GV, TF); in emitMachineConstantPoolValue()
1483 const unsigned TF = Op.getTargetFlags(); in emitInstruction() local
1484 MCSymbol *GVSym = GetARMGVSymbol(GV, TF); in emitInstruction()
1501 MCSymbol *GVSym = GetARMGVSymbol(GV, TF); in emitInstruction()
[all …]
/llvm-project-15.0.7/clang/lib/Basic/
H A DBuiltins.cpp223 TargetFeatures TF(TargetFetureMap); in evaluateRequiredTargetFeatures() local
224 return TF.hasRequiredFeatures(RequiredFeatures); in evaluateRequiredTargetFeatures()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1748 unsigned TF);
1848 JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned TF)
1850 0, DebugLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) {
1875 Align Alignment, unsigned TF)
1878 Offset(o), Alignment(Alignment), TargetFlags(TF) {
1884 Align Alignment, unsigned TF)
1887 Offset(o), Alignment(Alignment), TargetFlags(TF) {
1934 TargetIndexSDNode(int Idx, EVT VT, int64_t Ofs, unsigned TF)
1936 TargetFlags(TF), Index(Idx), Offset(Ofs) {}
2223 ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned TF, EVT VT)
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.h82 decomposeMachineOperandsTargetFlags(unsigned TF) const override;
/llvm-project-15.0.7/clang/lib/Analysis/
H A DLiveVariables.cpp482 TransferFunctions TF(*this, val, obs, block); in runOnBlock() local
486 TF.Visit(const_cast<Stmt*>(term)); in runOnBlock()
503 TF.Visit(const_cast<Stmt*>(S)); in runOnBlock()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonConstExtenders.cpp349 unsigned char TF; // TargetFlags. member
716 TF = Op.getTargetFlags(); in ExtRoot()
782 return MachineOperand::CreateES(V.SymbolName, TF); in operator MachineOperand()
784 return MachineOperand::CreateGA(V.GV, Offset, TF); in operator MachineOperand()
786 return MachineOperand::CreateBA(V.BA, Offset, TF); in operator MachineOperand()
788 return MachineOperand::CreateTargetIndex(V.ImmVal, Offset, TF); in operator MachineOperand()
790 return MachineOperand::CreateCPI(V.ImmVal, Offset, TF); in operator MachineOperand()
793 return MachineOperand::CreateJTI(V.ImmVal, TF); in operator MachineOperand()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h183 decomposeMachineOperandsTargetFlags(unsigned TF) const override;
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/bugprone/
H A Deasily-swappable-parameters-implicits.cpp293 void pointerConversion6(void (*NTF)() noexcept, void (*TF)()) {} in pointerConversion6() argument
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DIfConversion.cpp899 MachineBasicBlock *TF = TrueBBI.FalseBB; in ValidForkedDiamond() local
905 if (!TF) in ValidForkedDiamond()
906 TF = getNextBlock(*TrueBBI.BB); in ValidForkedDiamond()
912 if (!TT || !TF) in ValidForkedDiamond()
916 if (!((TT == FT && TF == FF) || (TF == FT && TT == FF))) in ValidForkedDiamond()
920 if (TF == FT && TT == FF) { in ValidForkedDiamond()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h131 decomposeMachineOperandsTargetFlags(unsigned TF) const override;
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelLowering.h206 SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const;

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