| /llvm-project-15.0.7/lld/test/ELF/ |
| H A D | ppc64-plt-stub-compatible.s | 79 # T3-LABEL: <p10codegen>: 82 # T3-NEXT: 1001030c: blr 84 # T3-LABEL: <p9codegen>: 91 # T3-NEXT: 10010328: blr 93 # T3-LABEL: <__plt_pcrel_callee>: 95 # T3-NEXT: 10010338: mtctr 12 96 # T3-NEXT: 1001033c: bctr 98 # T3-LABEL: <__plt_callee>: 102 # T3-NEXT: 1001035c: mtctr 12 103 # T3-NEXT: 10010360: bctr [all …]
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| /llvm-project-15.0.7/clang/test/SemaTemplate/ |
| H A D | generic-lambda.cpp | 18 return []<class T3>(T3) -> X<T3> { in t1() 20 static_assert(is_same<T3, X<T2>>); in t1() 21 return X<T3>(); in t1() 35 return []<class T3>(T3) { 37 static_assert(is_same<T3, X<T2>>); 38 return X<T3>(); 52 return []<C1<T2> T3>(T3) -> C1<T3> auto { 53 return X<T3>();
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| /llvm-project-15.0.7/compiler-rt/test/fuzzer/ |
| H A D | set_cover_merge.test | 32 RUN: mkdir -p %t/T3 37 RUN: echo ...Z.. > %t/T3/1 38 RUN: echo ....E. > %t/T3/2 39 RUN: echo .....R > %t/T3/3 40 RUN: echo .UZZER. > %t/T3/a 42 RUN: echo ...... > %t/T3/c 51 # Make sure that we are prefering smaller files (T3/a over T3/b). 59 RUN: echo ...Z.. > %t/T3/1 60 RUN: echo ....E. > %t/T3/2 61 RUN: echo .....R > %t/T3/3 [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | shift-amount-reassociation.ll | 16 ; CHECK-NEXT: ret i32 [[T3]] 91 ; CHECK-NEXT: ret i32 [[T3]] 102 ; CHECK-NEXT: ret i32 [[T3]] 115 ; CHECK-NEXT: ret i32 [[T3]] 126 ; CHECK-NEXT: ret i32 [[T3]] 137 ; CHECK-NEXT: ret i32 [[T3]] 148 ; CHECK-NEXT: ret i32 [[T3]] 183 ; CHECK-NEXT: ret i32 [[T3]] 214 ; CHECK-NEXT: ret i32 [[T3]] 228 ; CHECK-NEXT: ret i32 [[T3]] [all …]
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| H A D | redundant-left-shift-input-masking-variant-a.ll | 23 ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] 27 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 52 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 78 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 200 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 228 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 260 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 293 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 318 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 343 ; CHECK-NEXT: call void @use32(i32 [[T3]]) [all …]
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| H A D | redundant-left-shift-input-masking-variant-b.ll | 23 ; CHECK-NEXT: [[T3:%.*]] = sub i32 32, [[NBITS]] 27 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 52 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 78 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 200 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 228 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 260 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 293 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 318 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 343 ; CHECK-NEXT: call void @use32(i32 [[T3]]) [all …]
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| H A D | partally-redundant-left-shift-input-masking-variant-d.ll | 20 ; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], -1 23 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 24 ; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[X:%.*]], [[T3]] 50 ; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]]) 51 ; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T3]] 73 ; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]]) 74 ; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T3]] 96 ; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]]) 119 ; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], -1 123 ; CHECK-NEXT: call void @use32(i32 [[T3]]) [all …]
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| H A D | signext.ll | 11 ; CHECK-NEXT: [[T3:%.*]] = ashr exact i32 [[SEXT]], 16 12 ; CHECK-NEXT: ret i32 [[T3]] 25 ; CHECK-NEXT: [[T3:%.*]] = add nsw i32 [[T2]], 32768 26 ; CHECK-NEXT: ret i32 [[T3]] 39 ; CHECK-NEXT: ret <2 x i32> [[T3]] 50 ; CHECK-NEXT: [[T3:%.*]] = ashr exact i32 [[SEXT]], 16 51 ; CHECK-NEXT: ret i32 [[T3]] 63 ; CHECK-NEXT: ret <2 x i32> [[T3]] 111 ; CHECK-NEXT: [[T3:%.*]] = ashr exact i32 [[SEXT]], 24 112 ; CHECK-NEXT: ret i32 [[T3]] [all …]
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| H A D | signed-truncation-check.ll | 431 ; CHECK-NEXT: [[T4:%.*]] = add i16 [[T3]], 128 450 ; CHECK-NEXT: [[T4:%.*]] = add i16 [[T3]], 128 483 ; CHECK-NEXT: call void @use1(i1 [[T3]]) 504 ; CHECK-NEXT: call void @use1(i1 [[T3]]) 525 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 550 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 574 ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[ARG]], 24 575 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 604 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 633 ; CHECK-NEXT: call void @use8(i8 [[T3]]) [all …]
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| H A D | icmp-logical.ll | 415 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 432 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 493 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 510 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 582 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 599 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 755 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 772 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 821 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 838 ; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3 [all …]
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| H A D | partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll | 22 ; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], -33 26 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 28 ; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], [[T3]] 62 ; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]]) 153 ; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], -33 157 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 161 ; CHECK-NEXT: [[T6:%.*]] = shl i32 [[T5]], [[T3]] 186 ; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], -33 190 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 194 ; CHECK-NEXT: [[T6:%.*]] = shl i32 [[T5]], [[T3]] [all …]
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| H A D | redundant-left-shift-input-masking-variant-d.ll | 44 ; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], 1 48 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 49 ; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]] 156 ; CHECK-NEXT: ret i32 [[T3]] 179 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 207 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 237 ; CHECK-NEXT: ret i32 [[T3]] 258 ; CHECK-NEXT: ret i32 [[T3]] 279 ; CHECK-NEXT: ret i32 [[T3]] 332 ; CHECK-NEXT: ret i32 [[T3]] [all …]
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| H A D | select-of-bittest.ll | 104 ; CHECK-NEXT: ret i32 [[T3]] 118 ; CHECK-NEXT: ret <2 x i32> [[T3]] 132 ; CHECK-NEXT: ret <2 x i32> [[T3]] 146 ; CHECK-NEXT: ret <3 x i32> [[T3]] 311 ; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], 1 465 ; CHECK-NEXT: call void @use1(i1 [[T3]]) 490 ; CHECK-NEXT: call void @use32(i32 [[T3]]) 510 ; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], 1 562 ; CHECK-NEXT: ret i32 [[T3]] 596 ; CHECK-NEXT: ret i32 [[T3]] [all …]
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| /llvm-project-15.0.7/llvm/test/LTO/X86/ |
| H A D | type-mapping-bug3.ll | 10 ; T2 is the non-opaque struct required to trigger the uniqued T2.0 and T3.0 to 11 ; respectively T2 and T3 in the destination module. 12 %"T2" = type { %"T3"* } 13 %"T3" = type opaque 22 declare void @d(%"T3"*) 26 %f.addr = alloca %"T3"*load %"T3"*, %"T3"** %f.addr 29 call void @d(%"T3"* %0) 46 ; The reference to d and T3 that gets loaded into %t0.o 47 !7 = !DITemplateValueParameter(value: void (%"T3"*)* @d)
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| /llvm-project-15.0.7/libcxx/test/std/utilities/utility/utility.inplace/ |
| H A D | inplace.pass.cpp | 54 using T3 = std::in_place_type_t<const int>; in main() typedef 55 static_assert(!std::is_same<T1, T2>::value && !std::is_same<T1, T3>::value); in main() 56 static_assert(!std::is_same<T2, T3>::value); in main() 59 static_assert(check_tag<T3>(std::in_place_type<const int>)); in main() 65 using T3 = std::in_place_index_t<static_cast<size_t>(-1)>; in main() typedef 66 static_assert(!std::is_same<T1, T2>::value && !std::is_same<T1, T3>::value); in main() 67 static_assert(!std::is_same<T2, T3>::value); in main() 70 static_assert(check_tag<T3>(std::in_place_index<static_cast<size_t>(-1)>)); in main()
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| /llvm-project-15.0.7/llvm/utils/unittest/googletest/include/gtest/internal/ |
| H A D | gtest-type-util.h | 144 typedef Types2<T2, T3> Tail; 150 typedef Types3<T2, T3, T4> Tail; 156 typedef Types4<T2, T3, T4, T5> Tail; 163 typedef Types5<T2, T3, T4, T5, T6> Tail; 170 typedef Types6<T2, T3, T4, T5, T6, T7> Tail; 829 typedef internal::Types3<T1, T2, T3> type; 1684 typedef Templates2<T2, T3> Tail; 1691 typedef Templates3<T2, T3, T4> Tail; 1698 typedef Templates4<T2, T3, T4, T5> Tail; 2509 typedef Templates3<T1, T2, T3> type; [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/ |
| H A D | add.ll | 172 ; GP32-CMOV: move $5, $[[T3]] 205 ; MMR6: lw $[[T3:[0-9]+]], 32($sp) 313 ; PRE4: xori $[[T3:[0-9]+]], $[[T2]], 1 327 ; GP32-CMOV: movz $[[T3]], $[[T1]], $[[T1]] 340 ; GP64: daddu $2, $4, $[[T3]] 346 ; MMR3: movz $[[T3]], $[[T1]], $[[T1]] 353 ; MMR6: xori $[[T3:[0-9]+]], $[[T2]], 1 462 ; PRE4: xori $[[T3:[0-9]+]], $[[T2]], 1 476 ; GP32-CMOV: movz $[[T3]], $[[T1]], $[[T1]] 490 ; GP64: daddu $2, $4, $[[T3]] [all …]
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| /llvm-project-15.0.7/libcxx/test/std/ranges/range.req/range.refinements/ |
| H A D | viewable_range.compile.pass.cpp | 57 struct T3 : test_range<cpp20_input_iterator>, std::ranges::view_base { struct 58 T3(T3 const&) = default; 60 static_assert(std::ranges::range<T3>); 61 static_assert(std::ranges::view<T3>); 62 static_assert(std::constructible_from<T3, T3>); 64 static_assert(std::ranges::viewable_range<T3>); 65 static_assert(std::ranges::viewable_range<T3&>); 66 static_assert(std::ranges::viewable_range<T3&&>); 67 static_assert(std::ranges::viewable_range<T3 const>); 68 static_assert(std::ranges::viewable_range<T3 const&>); [all …]
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| /llvm-project-15.0.7/clang/test/Index/ |
| H A D | complete-documentation-templates.cpp | 25 class T3 { class 52 typedef T3<double> T12; 56 T3<int>::T4(); in test_CC2_CC3_CC4() 57 T3<int> t3; in test_CC2_CC3_CC4() 59 T3<int>::T8 t8; in test_CC2_CC3_CC4()
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| /llvm-project-15.0.7/clang/test/Parser/ |
| H A D | cxx-ambig-init-templ.cpp | 17 int k9 = T3 < a < b, c >> (d), e5 = 1 > (e4); 18 int k10 = 0 < T3 < a < b, c >> (d 28 int k4 = a < b, T3 < int > >(), // expected-error {{must be an expression}} 41 int k1 = c < b, T3 < int > x = 0 // expected-error {{no template named 'T3'}} 44 template<typename, int=0> struct T3 { T3(int); operator int(); }; struct 47 int k1 = c < b, T3 < int > x = 0 // ok 164 int k5 = T3<0, operator>>>::val, l5; 165 int k6 = T4<0, T3<0, operator>>>>::val, l6; 169 template<int, Fn> struct T3 { enum { val }; }; struct
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| /llvm-project-15.0.7/llvm/unittests/Support/ |
| H A D | Casting.cpp | 87 struct T3 { struct 88 T3(const T1 *x) : hasValue(x != nullptr) {} in T3() function 95 template <> struct CastInfo<T3, T1 *> : public ValueFromPointerCast<T3, T1> {}; 99 T4(const T3 &x) : hasValue(true) {} in T4() 101 static bool classof(const T3 *x) { return true; } in classof() 105 template <> struct ValueIsPresent<T3> { 106 using UnwrappedType = T3; 108 static inline const T3 &unwrapValue(const T3 &t) { return t; } in unwrapValue() 111 template <> struct CastInfo<T4, T3> { 244 T3 t3 = dyn_cast<T3>(&t1); in TEST() [all …]
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| /llvm-project-15.0.7/clang/test/CXX/special/class.inhctor/ |
| H A D | p3.cpp | 41 template<typename T> struct T3 : T1<int> { struct 52 friend T3<int>::T3(int); // expected-error {{cannot befriend target of using declaration}} 53 friend T3<int>::T3(int, int); // expected-error {{cannot befriend target of using declaration}}
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| /llvm-project-15.0.7/llvm/test/Verifier/ |
| H A D | fp-intrinsics.ll | 3 ; RUN: sed -e s/.T3:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK3 … 49 ;T3: define double @f3(double %a, double %b) #0 { 50 ;T3: entry: 51 ;T3: %fadd = call double @llvm.experimental.constrained.fadd.f64( 52 ;T3: double %a, double %b, 53 ;T3: metadata !"round.dynamic", 54 ;T3: metadata !"fpexcept.restrict") #0 55 ;T3: ret double %fadd 56 ;T3: }
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| /llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_syscall_linux_x86_64.inc | 38 template <typename T1, typename T2, typename T3> 39 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3) { 46 template <typename T1, typename T2, typename T3, typename T4> 47 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3, T4 arg4) { 56 template <typename T1, typename T2, typename T3, typename T4, typename T5> 57 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3, T4 arg4, 68 template <typename T1, typename T2, typename T3, typename T4, typename T5, 70 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3, T4 arg4,
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | fp_to_uint.ll | 204 ; EG-NEXT: LSHR * T3.W, PV.W, 1, 326 ; EG-NEXT: LSHR T3.X, T3.W, 1, 473 ; EG-NEXT: LSHL T3.W, T0.Z, PV.Z, 488 ; EG-NEXT: CNDE_INT * T3.W, T2.Z, T3.W, 0.0, 494 ; EG-NEXT: LSHR * T3.W, PV.Y, 1, 497 ; EG-NEXT: LSHL T3.Y, T1.Y, PV.Z, 511 ; EG-NEXT: CNDE_INT T1.W, PV.X, T3.X, T3.Y, BS:VEC_021/SCL_122 538 ; EG-NEXT: ADD_INT * T3.W, T3.X, literal.y, 541 ; EG-NEXT: SUB_INT T3.Y, literal.y, T3.X, 562 ; EG-NEXT: CNDE_INT T3.Y, PS, T3.Y, T3.Z, [all …]
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