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/llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/
H A Dmul.ll36 ; M2: andi $[[T0]], $[[T0]], 1
40 ; 32R1-R5: andi $[[T0]], $[[T0]], 1
44 ; 32R6: andi $[[T0]], $[[T0]], 1
49 ; M4: andi $[[T0]], $[[T0]], 1
53 ; 64R1-R5: andi $[[T0]], $[[T0]], 1
57 ; 64R6: andi $[[T0]], $[[T0]], 1
61 ; MM32: andi16 $[[T0]], $[[T0]], 1
75 ; M2: sll $[[T0]], $[[T0]], 24
79 ; 32R1: sll $[[T0]], $[[T0]], 24
90 ; M4: sll $[[T0]], $[[T0]], 24
[all …]
H A Dselect-int.ll37 ; M2-M3: andi $[[T0:[0-9]+]], $4, 1
46 ; CMOV: andi $[[T0:[0-9]+]], $4, 1
47 ; CMOV: movn $6, $5, $[[T0]]
50 ; SEL: andi $[[T0:[0-9]+]], $4, 1
83 ; CMOV: movn $6, $5, $[[T0]]
119 ; CMOV: movn $6, $5, $[[T0]]
162 ; CMOV-32: movn $2, $6, $[[T0]]
164 ; CMOV-32: movn $3, $7, $[[T0]]
185 ; CMOV-64: movn $6, $5, $[[T0]]
190 ; SEL-64: sll $[[T0]], $[[T0]], 0
[all …]
H A Dadd.ll42 ; NOT-R2-R6: andi $[[T0]], $[[T0]], 1
46 ; R2-R6: andi $[[T0]], $[[T0]], 1
50 ; MMR6: andi16 $[[T0]], $[[T0]], 1
52 ; MMR6: subu16 $[[T0]], $[[T1]], $[[T0]]
63 ; NOT-R2-R6: sll $[[T0]], $[[T0]], 24
81 ; NOT-R2-R6: sll $[[T0]], $[[T0]], 16
245 ; NOT-R2-R6: addu $[[T0]], $[[T0]], $[[T1]]
263 ; NOT-R2-R6: addu $[[T0]], $[[T0]], $[[T1]]
372 ; GP32: andi $[[T0]], $[[T0]], 1
376 ; GP64: andi $[[T0]], $[[T0]], 1
[all …]
H A Dsub.ll37 ; NOT-MM: andi $[[T0]], $[[T0]], 1
38 ; NOT-MM: negu $2, $[[T0]]
41 ; MM: andi16 $[[T0]], $[[T0]], 1
54 ; NOT-R2-R6: sll $[[T0]], $[[T0]], 24
61 ; MM: seb $[[T0]], $[[T0]]
72 ; NOT-R2-R6: sll $[[T0]], $[[T0]], 16
79 ; MM: seh $[[T0]], $[[T0]]
103 ; GP32: subu $2, $2, $[[T0]]
108 ; MM32: subu16 $2, $3, $[[T0]]
128 ; PRE4: sltu $[[T5]], $6, $[[T0]]
[all …]
/llvm-project-15.0.7/lld/test/COFF/
H A Dpdb-framedata.yaml74 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = '
82 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
90 FrameFunc: '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
159 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = '
167 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
175 FrameFunc: '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
183 … FrameFunc: '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = $esi $T0 8 - ^ = '
257 - '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = '
258 - '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
259 - '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dfcmp.ll56 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
89 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
122 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
155 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
188 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
223 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
259 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
293 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
326 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
359 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
[all …]
H A Dfmadd1.ll36 ; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]
42 ; 32R2: mtc1 $6, $[[T0:f[0-9]+]]
47 ; 32R6-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]
76 ; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]
82 ; 32R2: mtc1 $6, $[[T0:f[0-9]+]]
87 ; 32R6-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]
116 ; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]
122 ; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]
125 ; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]
130 ; 32R6-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]
[all …]
/llvm-project-15.0.7/lldb/test/Shell/SymbolFile/Breakpad/Inputs/
H A Dunwind-via-raSearch.syms10 STACK WIN 4 1010 6d 0 0 0 0 0 0 1 $T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + =
11 STACK WIN 4 1080 8 0 0 0 0 0 0 1 $T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + =
12 STACK WIN 4 1090 5 0 0 50 0 0 0 1 $T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + =
13 STACK WIN 4 1100 4 0 0 0 0 0 0 1 $T0 .raSearch 80 + = $eip $T0 ^ = $esp $T0 4 + =
14 STACK WIN 4 1110 4 0 0 0 0 0 0 1 $T0 .raSearch = $eip $T0 ^ = $esp .raSearch 4 + =
15 STACK WIN 4 1120 4 0 0 0 4 8 0 1 $T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + =
H A Dunwind-via-stack-win.syms11 STACK WIN 4 1010 6d 0 0 0 0 0 0 1 $T0 $esp 80 + = $eip $T0 ^ = $esp $T0 4 + =
12 STACK WIN 4 1080 8 0 0 0 0 0 0 1 $T0 $esp = $eip $T0 ^ = $esp $T0 4 + =
13 STACK WIN 4 1090 5 0 0 50 0 0 0 1 $T0 $esp = $eip $T0 ^ = $esp $T0 4 + =
15 STACK WIN 4 1110 4 0 0 0 0 0 0 1 $T0 $bogus = $eip $T0 ^ = $esp $T0 4 + =
16 STACK WIN 4 1120 4 0 0 0 0 0 0 1 $T0 $esp = $eip $T0 ^ = $esp $bogus 4 + =
17 STACK WIN 4 1130 4 0 0 0 0 0 0 1 $T0 $esp = $bogus $T0 = $eip $bogus ^ = $esp $T0 4 + =
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dmul_uint24-r600.ll17 ; CM-NEXT: MULLO_INT T1.X, T0.W, T0.Z,
18 ; CM-NEXT: MULLO_INT T1.Y (MASKED), T0.W, T0.Z,
57 ; CM-NEXT: VTX_READ_16 T0.X, T0.X, 42, #3
61 ; CM-NEXT: MULLO_INT T0.X, T1.X, T0.X,
80 ; EG-NEXT: VTX_READ_16 T0.X, T0.X, 42, #3
84 ; EG-NEXT: MULLO_INT * T0.X, T1.X, T0.X,
107 ; CM-NEXT: VTX_READ_8 T0.X, T0.X, 41, #3
111 ; CM-NEXT: MULLO_INT T0.X, T1.X, T0.X,
130 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 41, #3
134 ; EG-NEXT: MULLO_INT * T0.X, T1.X, T0.X,
[all …]
H A Dr600.extract-lowbits.ll58 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
77 ; CM-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
166 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
185 ; CM-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
274 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
278 ; EG-NEXT: SUB_INT * T0.W, literal.x, T0.X,
297 ; CM-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
390 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
399 ; EG-NEXT: LSHR T0.X, PV.W, T0.W,
412 ; CM-NEXT: VTX_READ_8 T0.X, T0.X, 40, #3
[all …]
H A Dshared-op-cycle.ll9 ; CHECK-NEXT: EXPORT T0.X___
12 ; CHECK-NEXT: MULADD_IEEE T0.X, T0.W, T0.W, literal.x,
13 ; CHECK-NEXT: MULADD_IEEE T0.Y, T1.W, T1.W, literal.x, BS:VEC_120/SCL_212
14 ; CHECK-NEXT: MULADD_IEEE * T0.Z, T2.W, T2.W, literal.x, BS:VEC_201
16 ; CHECK-NEXT: DOT4 T0.X, T0.X, T0.X,
17 ; CHECK-NEXT: DOT4 T0.Y (MASKED), T0.Y, T0.Y,
18 ; CHECK-NEXT: DOT4 T0.Z (MASKED), T0.Z, T0.Z,
19 ; CHECK-NEXT: DOT4 * T0.W (MASKED), T0.W, T0.W,
H A Dctpop16.ll119 ; EG-NEXT: LSHL * T0.W, T0.X, 1,
205 ; EG-NEXT: LSHL * T0.W, T0.X, 1,
292 ; EG-NEXT: LSHL * T0.W, T0.X, 1,
297 ; EG-NEXT: BCNT_INT T0.W, T0.X,
1067 ; EG-NEXT: LSHL * T0.W, T0.X, 1,
1070 ; EG-NEXT: BCNT_INT T0.W, T0.X,
1142 ; EG-NEXT: BCNT_INT T0.W, T0.X,
1216 ; EG-NEXT: BCNT_INT T0.W, T0.X,
1296 ; EG-NEXT: BCNT_INT T0.W, T0.X,
1377 ; EG-NEXT: BCNT_INT T0.W, T0.X,
[all …]
H A Dudivrem.ll17 ; R600-NEXT: MULHI * T0.Y, T0.X, PS,
18 ; R600-NEXT: ADD_INT * T0.W, T0.X, PS,
24 ; R600-NEXT: CNDE_INT * T0.W, PS, T0.W, PV.W,
25 ; R600-NEXT: ADD_INT T0.Z, T0.X, 1,
132 ; R600-NEXT: MULHI * T0.W, T0.Z, PS,
133 ; R600-NEXT: ADD_INT T0.W, T0.Z, PS,
134 ; R600-NEXT: MULHI * T0.Y, T0.X, T0.Y,
269 ; R600-NEXT: MULHI * T0.W, T0.Z, PS,
270 ; R600-NEXT: ADD_INT T0.W, T0.Z, PS,
271 ; R600-NEXT: MULHI * T0.Y, T0.X, T0.Y,
[all …]
/llvm-project-15.0.7/llvm/test/MC/COFF/
H A Dcv-fpo-csrs.s80 # OBJ-NEXT: $T0 .raSearch =
81 # OBJ-NEXT: $eip $T0 ^ =
82 # OBJ-NEXT: $esp $T0 4 + =
97 # OBJ-NEXT: $eip $T0 ^ =
98 # OBJ-NEXT: $esp $T0 4 + =
114 # OBJ-NEXT: $eip $T0 ^ =
115 # OBJ-NEXT: $esp $T0 4 + =
132 # OBJ-NEXT: $eip $T0 ^ =
133 # OBJ-NEXT: $esp $T0 4 + =
151 # OBJ-NEXT: $eip $T0 ^ =
[all …]
H A Dcv-fpo-setframe.s83 # OBJ-NEXT: $T0 .raSearch =
84 # OBJ-NEXT: $eip $T0 ^ =
85 # OBJ-NEXT: $esp $T0 4 + =
100 # OBJ-NEXT: $eip $T0 ^ =
101 # OBJ-NEXT: $esp $T0 4 + =
116 # OBJ-NEXT: $T0 $ebp 4 + =
117 # OBJ-NEXT: $eip $T0 ^ =
118 # OBJ-NEXT: $esp $T0 4 + =
134 # OBJ-NEXT: $eip $T0 ^ =
152 # OBJ-NEXT: $eip $T0 ^ =
[all …]
H A Dcv-fpo-realign.s27 # CHECK: $T0 .raSearch =
28 # CHECK: $eip $T0 ^ =
29 # CHECK: $esp $T0 4 + =
35 # CHECK: $eip $T0 ^ =
36 # CHECK: $esp $T0 4 + =
42 # CHECK: $T0 $ebp 4 + =
43 # CHECK: $eip $T0 ^ =
44 # CHECK: $esp $T0 4 + =
50 # CHECK: $T0 $ebp 4 + =
51 # CHECK: $eip $T0 ^ =
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dpull-binop-through-shift.ll8 ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], 8
9 ; CHECK-NEXT: [[R:%.*]] = and i32 [[T0]], -16777216
18 ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], 8
29 ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], 8
39 ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], 8
50 ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], 8
60 ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], 8
158 ; CHECK-NEXT: [[R:%.*]] = lshr i32 [[T0]], 8
168 ; CHECK-NEXT: [[R:%.*]] = lshr i32 [[T0]], 8
244 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[T0]], 8
[all …]
H A Dunsigned-add-lack-of-overflow-check-via-xor.ll16 ; CHECK-NEXT: [[T0:%.*]] = xor i8 [[Y:%.*]], -1
17 ; CHECK-NEXT: call void @use8(i8 [[T0]])
47 ; CHECK-NEXT: call void @use8(i8 [[T0]])
77 ; CHECK-NEXT: call void @use8(i8 [[T0]])
90 ; CHECK-NEXT: call void @use8(i8 [[T0]])
103 ; CHECK-NEXT: call void @use8(i8 [[T0]])
116 ; CHECK-NEXT: call void @use8(i8 [[T0]])
129 ; CHECK-NEXT: call void @use8(i8 [[T0]])
142 ; CHECK-NEXT: call void @use8(i8 [[T0]])
155 ; CHECK-NEXT: call void @use8(i8 [[T0]])
[all …]
H A Dunsigned-add-overflow-check-via-xor.ll16 ; CHECK-NEXT: [[T0:%.*]] = xor i8 [[Y:%.*]], -1
17 ; CHECK-NEXT: call void @use8(i8 [[T0]])
47 ; CHECK-NEXT: call void @use8(i8 [[T0]])
77 ; CHECK-NEXT: call void @use8(i8 [[T0]])
90 ; CHECK-NEXT: call void @use8(i8 [[T0]])
103 ; CHECK-NEXT: call void @use8(i8 [[T0]])
116 ; CHECK-NEXT: call void @use8(i8 [[T0]])
129 ; CHECK-NEXT: call void @use8(i8 [[T0]])
142 ; CHECK-NEXT: call void @use8(i8 [[T0]])
155 ; CHECK-NEXT: call void @use8(i8 [[T0]])
[all …]
H A Dunsigned-add-overflow-check-via-add.ll19 ; CHECK-NEXT: call void @use8(i8 [[T0]])
47 ; CHECK-NEXT: call void @use8(i8 [[T0]])
63 ; CHECK-NEXT: call void @use8(i8 [[T0]])
77 ; CHECK-NEXT: call void @use8(i8 [[T0]])
91 ; CHECK-NEXT: call void @use8(i8 [[T0]])
120 ; CHECK-NEXT: call void @use8(i8 [[T0]])
133 ; CHECK-NEXT: call void @use8(i8 [[T0]])
146 ; CHECK-NEXT: call void @use8(i8 [[T0]])
159 ; CHECK-NEXT: call void @use8(i8 [[T0]])
172 ; CHECK-NEXT: call void @use8(i8 [[T0]])
[all …]
H A Dunsigned-add-lack-of-overflow-check-via-add.ll19 ; CHECK-NEXT: call void @use8(i8 [[T0]])
47 ; CHECK-NEXT: call void @use8(i8 [[T0]])
63 ; CHECK-NEXT: call void @use8(i8 [[T0]])
79 ; CHECK-NEXT: call void @use8(i8 [[T0]])
95 ; CHECK-NEXT: call void @use8(i8 [[T0]])
124 ; CHECK-NEXT: call void @use8(i8 [[T0]])
137 ; CHECK-NEXT: call void @use8(i8 [[T0]])
150 ; CHECK-NEXT: call void @use8(i8 [[T0]])
163 ; CHECK-NEXT: call void @use8(i8 [[T0]])
176 ; CHECK-NEXT: call void @use8(i8 [[T0]])
[all …]
/llvm-project-15.0.7/lld/test/COFF/Inputs/
H A Dpdb-hashes-1.yaml56 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = '
64 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
72 FrameFunc: '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
80 … FrameFunc: '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = $esi $T0 8 - ^ = '
183 - '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = '
184 - '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
185 - '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
186 - '$T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = $esi $T0 8 - ^ = '
339 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = '
347 FrameFunc: '$T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp $T0 4 - ^ = '
[all …]
/llvm-project-15.0.7/llvm/test/DebugInfo/COFF/
H A Dfpo-csrs.ll88 ; OBJ-NEXT: $eip $T0 ^ =
89 ; OBJ-NEXT: $esp $T0 4 + =
104 ; OBJ-NEXT: $eip $T0 ^ =
105 ; OBJ-NEXT: $esp $T0 4 + =
155 ; OBJ-NEXT: $eip $T0 ^ =
171 ; OBJ-NEXT: $eip $T0 ^ =
188 ; OBJ-NEXT: $eip $T0 ^ =
241 ; OBJ-NEXT: $eip $T0 ^ =
257 ; OBJ-NEXT: $eip $T0 ^ =
274 ; OBJ-NEXT: $eip $T0 ^ =
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-pdbutil/
H A Dfpo-data.test12 … 0 | 4 | 0 | false | false | true | $T0 .raSearch = $eip $T0 ^ = $esp $T0 4 +…
13 … 3 | 4 | false | false | false | $T0 .raSearch = $eip $T0 ^ = $esp $T0 4 + = $ebp…
14 … 1 | 4 | false | false | false | $T0 $ebp 4 + = $eip $T0 ^ = $esp $T0 4 + = $ebp …

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