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Searched refs:Successor (Results 1 – 25 of 54) sorted by relevance

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/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dvplan-sink-scalars-and-merge.ll19 ; CHECK-NEXT: Successor(s): vector loop
27 ; CHECK-NEXT: Successor(s): loop.0
30 ; CHECK-NEXT: Successor(s): pred.store
331 ; CHECK-NEXT: Successor(s): then.0
354 ; CHECK-NEXT: Successor(s): next.0
433 ; CHECK-NEXT: Successor(s): then.0
456 ; CHECK-NEXT: Successor(s): next.0
462 ; CHECK-NEXT: Successor(s): then.1
485 ; CHECK-NEXT: Successor(s): next.1
714 ; CHECK-NEXT: Successor(s): latch
[all …]
H A Dfirst-order-recurrence-sink-replicate-region.ll17 ; CHECK-NEXT: Successor(s): vector loop
26 ; CHECK-NEXT: Successor(s): loop.0
29 ; CHECK-NEXT: Successor(s): pred.load
45 ; CHECK-NEXT: Successor(s): loop.1
50 ; CHECK-NEXT: Successor(s): pred.srem
114 ; CHECK-NEXT: Successor(s): loop.0
140 ; CHECK-NEXT: Successor(s): loop.1
189 ; CHECK-NEXT: Successor(s): loop.0
267 ; CHECK-NEXT: Successor(s): loop.0
285 ; CHECK-NEXT: Successor(s): loop.1
[all …]
H A Dvplan-sink-scalars-and-merge-vf1.ll14 ; CHECK-NEXT: Successor(s): vector loop
25 ; CHECK-NEXT: Successor(s): if.then
28 ; CHECK-NEXT: Successor(s): pred.store
33 ; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue
37 ; CHECK-NEXT: Successor(s): pred.store.continue
44 ; CHECK-NEXT: Successor(s): for.inc
51 ; CHECK-NEXT: Successor(s): middle.block
H A Dvplan-printing.ll15 ; CHECK-NEXT: Successor(s): vector loop
30 ; CHECK-NEXT: Successor(s): middle.block
61 ; CHECK-NEXT: Successor(s): vector loop
112 ; CHECK-NEXT: Successor(s): vector loop
209 ; CHECK-NEXT: Successor(s): if.then
212 ; CHECK-NEXT: Successor(s): pred.udiv
227 ; CHECK-NEXT: Successor(s): if.then.0
230 ; CHECK-NEXT: Successor(s): for.inc
406 ; CHECK-NEXT: Successor(s): check
410 ; CHECK-NEXT: Successor(s): if.then
[all …]
H A Dinterleave-and-scalarize-only.ll11 ; DBG-NEXT: Successor(s): vector loop
67 ; DBG-NEXT: Successor(s): vector loop
74 ; DBG-NEXT: Successor(s): cond.false
79 ; DBG-NEXT: Successor(s): cond.false.0
82 ; DBG-NEXT: Successor(s): pred.store
92 ; DBG-NEXT: Successor(s): pred.store.continue
98 ; DBG-NEXT: Successor(s): cond.false.1
101 ; DBG-NEXT: Successor(s): loop.latch
108 ; DBG-NEXT: Successor(s): middle.block
180 ; DBG-NEXT: Successor(s): vector loop
[all …]
H A Dicmp-uniforms.ll45 ; CHECK-NEXT: Successor(s): vector loop
55 ; CHECK-NEXT: Successor(s): pred.store
60 ; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue
65 ; CHECK-NEXT: Successor(s): pred.store.continue
70 ; CHECK-NEXT: Successor(s): loop.0
H A Dvplan-printing-outer-loop.ll12 ; CHECK-NEXT: Successor(s): outer.header
20 ; CHECK-NEXT: Successor(s): inner
32 ; CHECK-NEXT: Successor(s): outer.latch
40 ; CHECK-NEXT: Successor(s): exit
H A Dvplan-dot-printing.ll17 ; CHECK-NEXT: "Successor(s): vector loop\l"
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCExpandISEL.cpp335 MachineBasicBlock *Successor = nullptr; in reorganizeBlockLayout() local
355 Successor = Succ; in reorganizeBlockLayout()
360 Successor = NewSuccessor; in reorganizeBlockLayout()
390 MBB->removeSuccessor(Successor); in reorganizeBlockLayout()
396 MBB->addSuccessor(IsTrueBlockRequired ? TrueBlock : Successor); in reorganizeBlockLayout()
397 MBB->addSuccessor(IsFalseBlockRequired ? FalseBlock : Successor); in reorganizeBlockLayout()
401 TrueBlock->addSuccessor(Successor); in reorganizeBlockLayout()
406 FalseBlock->addSuccessor(Successor); in reorganizeBlockLayout()
412 .addMBB(IsTrueBlockRequired ? TrueBlock : Successor); in reorganizeBlockLayout()
418 .addMBB(Successor); in reorganizeBlockLayout()
H A DPPCReduceCRLogicals.cpp56 static void updatePHIs(MachineBasicBlock *Successor, MachineBasicBlock *OrigMBB, in updatePHIs() argument
58 for (auto &MI : Successor->instrs()) { in updatePHIs()
70 !OrigMBB->isSuccessor(Successor)) { in updatePHIs()
85 static void addIncomingValuesToPHIs(MachineBasicBlock *Successor, in addIncomingValuesToPHIs() argument
91 for (auto &MI : Successor->instrs()) { in addIncomingValuesToPHIs()
/llvm-project-15.0.7/clang-tools-extra/clang-tidy/utils/
H A DExprSequence.cpp80 for (const Stmt *Successor = getSequenceSuccessor(Before); Successor; in inSequence() local
81 Successor = getSequenceSuccessor(Successor)) { in inSequence()
82 if (isDescendantOrEqual(After, Successor, Context)) in inSequence()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DInterval.cpp37 for (const BasicBlock *Successor : Successors) in print() local
38 OS << *Successor << "\n"; in print()
H A DIntervalPartition.cpp69 for (BasicBlock *Successor : Int->Successors) in updatePredecessors()
70 getBlockInterval(Successor)->Predecessors.push_back(Header); in updatePredecessors()
/llvm-project-15.0.7/mlir/include/mlir/TableGen/
H A DSuccessor.h20 class Successor : public Constraint {
38 Successor constraint;
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DInterval.h77 for (BasicBlock *Successor : Successors) in isSuccessor()
78 if (Successor == BB) in isSuccessor()
H A DLoopInfoImpl.h114 for (BlockT *Successor : children<BlockT *>(BB)) in getUniqueExitBlocksHelper()
115 if (!L->contains(Successor)) in getUniqueExitBlocksHelper()
116 if (Visited.insert(Successor).second) in getUniqueExitBlocksHelper()
117 ExitBlocks.push_back(Successor); in getUniqueExitBlocksHelper()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUUnifyDivergentExitNodes.cpp245 for (BasicBlock *Successor : Successors) { in runOnFunction()
246 Updates.push_back({DominatorTree::Insert, TransitionBB, Successor}); in runOnFunction()
247 Updates.push_back({DominatorTree::Delete, BB, Successor}); in runOnFunction()
/llvm-project-15.0.7/mlir/lib/TableGen/
H A DSuccessor.cpp22 bool Successor::isVariadic() const { in isVariadic()
H A DCMakeLists.txt27 Successor.cpp
/llvm-project-15.0.7/bolt/lib/Profile/
H A DYAMLProfileWriter.cpp124 for (const BinaryBasicBlock *Successor : BB->successors()) { in convert() local
126 YamlSI.Index = Successor->getLayoutIndex(); in convert()
/llvm-project-15.0.7/bolt/lib/Core/
H A DBinaryBasicBlock.cpp490 void BinaryBasicBlock::addBranchInstruction(const BinaryBasicBlock *Successor) { in addBranchInstruction() argument
491 assert(isSuccessor(Successor)); in addBranchInstruction()
495 BC.MIB->createUncondBranch(NewInst, Successor->getLabel(), BC.Ctx.get()); in addBranchInstruction()
/llvm-project-15.0.7/mlir/test/mlir-tblgen/
H A Dconstraint-unique.td23 def ASuccessor : Successor<ASuccessorPred, "a successor">;
24 def OtherSuccessor : Successor<ASuccessorPred, "another successor">;
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DBypassSlowDivision.cpp85 QuotRemWithBB createSlowBB(BasicBlock *Successor);
86 QuotRemWithBB createFastBB(BasicBlock *Successor);
/llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/
H A DVPlan.h408 void appendSuccessor(VPBlockBase *Successor) { in appendSuccessor() argument
409 assert(Successor && "Cannot add nullptr successor!"); in appendSuccessor()
410 Successors.push_back(Successor); in appendSuccessor()
427 void removeSuccessor(VPBlockBase *Successor) { in removeSuccessor() argument
428 auto Pos = find(Successors, Successor); in removeSuccessor()
551 void setOneSuccessor(VPBlockBase *Successor) { in setOneSuccessor() argument
553 appendSuccessor(Successor); in setOneSuccessor()
/llvm-project-15.0.7/llvm/unittests/Transforms/Vectorize/
H A DVPlanHCFGTest.cpp108 "Successor(s): for.body\l" in TEST_F()

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