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Searched refs:SuccEdge (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DPostRASchedulerList.cpp187 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
450 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc() argument
451 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc()
453 if (SuccEdge->isWeak()) { in ReleaseSucc()
H A DMachineScheduler.cpp638 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() argument
639 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
641 if (SuccEdge->isWeak()) { in releaseSucc()
643 if (SuccEdge->isCluster()) in releaseSucc()
657 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency()) in releaseSucc()
658 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency(); in releaseSucc()
H A DMachinePipeliner.cpp2854 for (SDep &SuccEdge : SU->Succs) { in checkValidNodeOrder()
2855 SUnit *SuccSU = SuccEdge.getSUnit(); in checkValidNodeOrder()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h195 void undoReleaseSucc(SUnit *SU, SDep *SuccEdge);
196 void releaseSucc(SUnit *SU, SDep *SuccEdge);
H A DSIMachineScheduler.cpp434 void SIScheduleBlock::undoReleaseSucc(SUnit *SU, SDep *SuccEdge) { in undoReleaseSucc() argument
435 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc()
437 if (SuccEdge->isWeak()) { in undoReleaseSucc()
444 void SIScheduleBlock::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() argument
445 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
447 if (SuccEdge->isWeak()) { in releaseSucc()
/llvm-project-15.0.7/bolt/runtime/
H A Dinstr.cpp1152 const uint32_t SuccEdge = CFGNodes[Cur].OutEdges[I].ID; in computeEdgeFrequencies() local
1153 CurNodeFreq += EdgeFreqs[SuccEdge]; in computeEdgeFrequencies()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h384 void releaseSucc(SUnit *SU, SDep *SuccEdge);