Searched refs:SrcOps (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.cpp | 117 profileSrcOps(SrcOps, B); in profileEverything() 196 assert(SrcOps.size() == 2 && "Invalid sources"); in buildInstr() 198 LLT SrcTy = SrcOps[0].getLLTTy(*getMRI()); in buildInstr() 207 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI()); in buildInstr() 231 assert(SrcOps.size() == 2 && "Invalid sources"); in buildInstr() 234 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr() 240 assert(SrcOps.size() == 2 && "Invalid src ops"); in buildInstr() 242 const SrcOp &Src0 = SrcOps[0]; in buildInstr() 243 const SrcOp &Src1 = SrcOps[1]; in buildInstr() 252 assert(SrcOps.size() == 1 && "Invalid sources"); in buildInstr() [all …]
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| H A D | MachineIRBuilder.cpp | 1034 SrcOps[1].getLLTTy(*getMRI()), SrcOps[2].getLLTTy(*getMRI())); in buildInstr() 1124 assert(SrcOps[1].getLLTTy(*getMRI()) == SrcOps[2].getLLTTy(*getMRI()) && in buildInstr() 1155 assert(llvm::all_of(SrcOps, in buildInstr() 1165 if (SrcOps.size() == 1) in buildInstr() 1202 assert((!SrcOps.empty() || SrcOps.size() < 2) && in buildInstr() 1207 assert(llvm::all_of(SrcOps, in buildInstr() 1220 assert((!SrcOps.empty() || SrcOps.size() < 2) && in buildInstr() 1225 assert(llvm::all_of(SrcOps, in buildInstr() 1238 assert((!SrcOps.empty() || SrcOps.size() < 2) && in buildInstr() 1240 assert(llvm::all_of(SrcOps, in buildInstr() [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.h | 73 ArrayRef<SrcOp> SrcOps, Optional<unsigned> Flags, 95 ArrayRef<SrcOp> SrcOps,
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| H A D | MachineIRBuilder.h | 1963 ArrayRef<SrcOp> SrcOps,
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 57 SmallVector<SrcOp, 2> SrcOps; ///< Source registers. member 59 std::initializer_list<SrcOp> SrcOps) in ShuffleVectorPseudo() 60 : Opc(Opc), Dst(Dst), SrcOps(SrcOps){}; in ShuffleVectorPseudo() 399 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, MatchInfo.SrcOps); in applyShuffleVectorPseudo() 411 MIRBuilder.buildConstant(LLT::scalar(32), MatchInfo.SrcOps[2].getImm()); in applyEXT() 413 {MatchInfo.SrcOps[0], MatchInfo.SrcOps[1], Cst}); in applyEXT()
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| H A D | AArch64InstructionSelector.cpp | 225 std::initializer_list<llvm::SrcOp> SrcOps, 4435 std::initializer_list<llvm::SrcOp> SrcOps, MachineIRBuilder &MIRBuilder, in emitInstr() argument 4440 auto MI = MIRBuilder.buildInstr(Opcode, DstOps, SrcOps); in emitInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6700 for (SDValue &Op : SrcOps) { in getAVX512Node() 23430 SrcOps.push_back(Src); in matchScalarReduction() 23442 for (SDValue &SrcOp : SrcOps) in matchScalarReduction() 39063 SDValue Op = SrcOps[SrcOpIndex]; in combineX86ShufflesRecursively() 39157 Ops.append(SrcOps.begin(), SrcOps.end()); in combineX86ShufflesRecursively() 47892 SmallVector<SDValue, 2> SrcOps; in combineAnd() local 47895 SrcOps.size() == 1) { in combineAnd() 48408 SmallVector<SDValue, 2> SrcOps; in combineOr() local 48411 SrcOps.size() == 1) { in combineOr() 49701 N0 = SrcOps.size() > 0 ? SrcOps[0] : SDValue(); in isHorizontalBinOp() [all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 21068 SmallVector<SDValue, 4> SrcOps; in combineConcatVectorOfCasts() local 21073 SrcOps.push_back(Op.getOperand(0)); in combineConcatVectorOfCasts() 21103 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, DL, ConcatSrcVT, SrcOps); in combineConcatVectorOfCasts()
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