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Searched refs:Src1VT (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DVOPInstructions.td1026 !subst(P.Src1RC32, P.Src1VT, tmp))));
1078 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),
1083 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers))))];
1097 dag src1_dag = (P.Src1VT (SrcPat P.Src1VT:$src1, i32:$src1_modifiers));
1124 (P.Src1VT (VOP3OpSel P.Src1VT:$src1, i32:$src1_modifiers)),
1129 (P.Src1VT (VOP3OpSel P.Src1VT:$src1, i32:$src1_modifiers))))];
1143 (P.Src1VT (VOP3OpSelMods P.Src1VT:$src1, i32:$src1_modifiers)),
1149 (P.Src1VT (VOP3OpSelMods P.Src1VT:$src1, i32:$src1_modifiers))))];
1160 list<dag> ret = [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))];
1185 list<dag> ret2 = [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1, i1:$clamp))];
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H A DSIInstrInfo.td2278 ValueType Src1VT> {
2285 !if(!eq(Src1VT.Size, 64),
2295 ValueType Src1VT = i32> {
2302 !if(!eq(Src1VT.Size, 64),
2318 ValueType Src1VT = i32> {
2324 ValueType Src1VT = i32> {
2331 ValueType Src1VT = i32> {
2362 !if(!eq(Src1VT.Size, 64),
2388 field ValueType Src1VT = ArgVT[2];
2411 field Operand Src1ModDPP = getSrcModDPP<Src1VT>.ret;
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H A DVOP3PInstructions.td740 (P.Src1VT (VOP3PMods P.Src1VT:$src1, i32:$src1_modifiers)),
743 ….DstVT (Inst i32:$src0_modifiers, P.Src0VT:$src0, i32:$src1_modifiers, P.Src1VT:$src1, $src2_modif…
749 (P.Src1VT P.Src1VT:$src1),
752 …(P.DstVT (Inst (i32 8), P.Src0VT:$src0, (i32 8), P.Src1VT:$src1, i32:$src2_modifiers, P.Src2VT:$sr…
758 (DotIUVOP3PMods i32:$src1_modifiers), (P.Src1VT P.Src1VT:$src1),
761 ….DstVT (Inst i32:$src0_modifiers, P.Src0VT:$src0, i32:$src1_modifiers, P.Src1VT:$src1, (i32 8), P.…
H A DVOP3Instructions.td801 dag ret3 = (P.DstVT (node P.Src0VT:$src0, P.Src1VT:$src1, P.Src2VT:$src2));
802 dag ret2 = (P.DstVT (node P.Src0VT:$src0, P.Src1VT:$src1));
810 dag ret3 = (inst P.Src0VT:$src0, P.Src1VT:$src1, P.Src2VT:$src2, (i1 0));
811 dag ret2 = (inst P.Src0VT:$src0, P.Src1VT:$src1, (i1 0));
H A DVOP2Instructions.td129 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers))))],
130 [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))]);
703 (getDivergentFrag<Op>.ret Inst.Pfl.Src0VT:$src0, Inst.Pfl.Src1VT:$src1),
712 (getDivergentFrag<Op>.ret Inst.Pfl.Src0VT:$src0, Inst.Pfl.Src1VT:$src1),
H A DVOPCInstructions.td53 let HasExtDPP = getHasVOP3DPP<DstVT, Src0VT, Src1VT, Src2VT>.ret;
233 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),
235 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]);
755 P.Src1VT:$src1))];
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1015 MVT Src1VT = Src1.getSimpleValueType(); in Select() local
1017 switch (RISCVTargetLowering::getLMUL(Src1VT)) { in Select()
1037 Log2_32(Src1VT.getScalarSizeInBits()), DL, XLenVT); in Select()
1074 MVT Src1VT = Src1.getSimpleValueType(); in Select() local
1077 switch (RISCVTargetLowering::getLMUL(Src1VT)) { in Select()
1116 Log2_32(Src1VT.getScalarSizeInBits()), DL, XLenVT); in Select()