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Searched refs:SignBitMask (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCXCOFFObjectWriter.cpp22 static constexpr uint8_t SignBitMask = 0x80; member in __anon2fdef4b70111::PPCXCOFFObjectWriter
52 const uint8_t EncodedSignednessIndicator = IsPCRel ? SignBitMask : 0u; in getRelocTypeAndSignSize()
/llvm-project-15.0.7/llvm/include/llvm/ADT/
H A DBitfields.h110 static constexpr Unsigned SignBitMask = Unsigned(1) << (Bits - 1); // 00100000 member
148 if (StorageValue >= T(BP::SignBitMask))
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp6347 auto SignBitMask = MIRBuilder.buildConstant( in lowerFCopySign() local
6356 And1 = MIRBuilder.buildAnd(Src1Ty, Src1, SignBitMask).getReg(0); in lowerFCopySign()
6361 And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask).getReg(0); in lowerFCopySign()
6366 And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask).getReg(0); in lowerFCopySign()
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp795 APInt &SignBitMask) -> bool { in foldSignedTruncationCheck() argument
803 SignBitMask = *I01; in foldSignedTruncationCheck()
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2146 const int SignBitMask = 0x80000000; in LowerFROUND32() local
2148 DAG.getConstant(SignBitMask, SL, MVT::i32)); in LowerFROUND32()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2086 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32); in LowerFTRUNC() local
2087 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC()
H A DAMDGPULegalizerInfo.cpp2159 const auto SignBitMask = B.buildConstant(S32, UINT32_C(1) << 31); in legalizeIntrinsicTrunc() local
2160 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc()