Searched refs:ShiftRight (Results 1 – 7 of 7) sorted by relevance
| /llvm-project-15.0.7/flang/include/flang/Evaluate/ |
| H A D | rounding-bits.h | 71 constexpr void ShiftRight(bool newGuard) { in ShiftRight() function
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| /llvm-project-15.0.7/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldChecker.cpp | 96 ShiftRight enumerator
163 return std::make_pair(BinOpToken::ShiftRight, Expr.substr(2).ltrim()); in parseBinOpToken()
202 case BinOpToken::ShiftRight: in computeBinOpResult()
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| /llvm-project-15.0.7/clang/lib/AST/Interp/ |
| H A D | Interp.h | 863 inline bool ShiftRight(InterpState &S, CodePtr OpPC, const T &V, unsigned RHS) { in ShiftRight() function
908 return ShiftRight<TL, TR>(S, OpPC, LHS, Trunc<TR, TL>(S, OpPC, Bits, RHS)); in Shr()
921 return ShiftRight<TL, TR>(S, OpPC, LHS, Trunc<TR, TL>(S, OpPC, Bits, -RHS)); in Shl()
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| /llvm-project-15.0.7/flang/lib/Evaluate/ |
| H A D | real.cpp | 127 roundingBits.ShiftRight(sum.value.BTEST(0)); in Add()
252 roundingBits.ShiftRight(quotient.BTEST(0)); in Divide()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1613 SDValue ShiftRight = Op.getOperand(0); in LowerTruncateToBTST() local
1614 return getBitTestCondition(ShiftRight.getOperand(0), ShiftRight.getOperand(1), in LowerTruncateToBTST()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4611 SDValue ShiftRight = in lowerEXTRACT_VECTOR_ELT() local
4613 return DAG.getNode(ISD::AND, DL, XLenVT, ShiftRight, in lowerEXTRACT_VECTOR_ELT()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6804 unsigned ShiftRight = NumElems - SubVecNumElems - IdxVal; in insert1BitVector() local
6807 if (ShiftRight != 0) in insert1BitVector()
6809 DAG.getTargetConstant(ShiftRight, dl, MVT::i8)); in insert1BitVector()
6846 unsigned ShiftRight = NumElems - SubVecNumElems - IdxVal; in insert1BitVector() local
6858 DAG.getTargetConstant(ShiftRight, dl, MVT::i8)); in insert1BitVector()
6869 DAG.getTargetConstant(ShiftRight, dl, MVT::i8)); in insert1BitVector()
47932 if (SDValue ShiftRight = combineAndMaskToShift(N, DAG, Subtarget)) in combineAnd() local
47933 return ShiftRight; in combineAnd()
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