| /llvm-project-15.0.7/llvm/test/tools/obj2yaml/ELF/ |
| H A D | gnu-hash-section.yaml | 14 # FIELDS-NEXT: Shift2: 0x2
30 Shift2: 0x2
50 # INVALID-NEXT: Shift2: 0x0
67 # INVALID-NEXT: Shift2: 0x0
96 Shift2: 0x0
108 Shift2: 0x0
120 Shift2: 0x0
132 Shift2: 0x0
|
| /llvm-project-15.0.7/llvm/test/tools/yaml2obj/ELF/ |
| H A D | gnu-hash-section.yaml | 95 Shift2: 0x2
112 Shift2: 0x2
149 Shift2: 0x0
163 Shift2: 0x0
177 Shift2: 0x0
181 ## Check that "SymNdx" and "Shift2" fields are mandatory when we specify the "Header".
187 # ERR3: error: missing required key 'Shift2'
198 Shift2: 0x0
248 Shift2: 0x0
254 ## using the "NBuckets" and "Shift2" keys.
[all …]
|
| /llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/ |
| H A D | gnuhash.test | 33 Shift2: 0x2
92 Shift2: 0x0
140 Shift2: 0x0
192 Shift2: 0x0
261 Shift2: 0x0
|
| H A D | hash-histogram.test | 45 Shift2: 0x0
239 Shift2: 0x0
286 Shift2: 0x0
350 Shift2: 0x0
395 Shift2: 0x0
|
| H A D | hash-symbols.test | 62 Shift2: 0x0
220 Shift2: 0x0
492 Shift2: 0x2
616 Shift2: 0x0
672 Shift2: 0x0
|
| /llvm-project-15.0.7/lldb/test/Shell/ObjectFile/ELF/ |
| H A D | null-jmprel.yaml | 66 Shift2: 0x6
|
| /llvm-project-15.0.7/llvm/test/tools/llvm-ifs/ |
| H A D | read-elf-dynsym.test | 90 Shift2: 0x2
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 466 SDValue Shift2 = DAG.getNode(ISD::SHL, DL, Ty, Add, Cst); in getAddrNonPICSym64() local
468 return DAG.getNode(ISD::ADD, DL, Ty, Shift2, in getAddrNonPICSym64()
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 74 MachineInstr *Shift2; member
|
| /llvm-project-15.0.7/llvm/test/tools/llvm-symbolizer/ |
| H A D | data-location.yaml | 179 Shift2: 0x1A
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1548 MatchInfo.Shift2 = LogicMIOp1; in matchShiftOfShiftedLogic()
1551 MatchInfo.Shift2 = LogicMIOp2; in matchShiftOfShiftedLogic()
1579 Register Shift1Base = MatchInfo.Shift2->getOperand(1).getReg(); in applyShiftOfShiftedLogic()
1584 Register Shift2 = Builder in applyShiftOfShiftedLogic() local
1590 Builder.buildInstr(MatchInfo.Logic->getOpcode(), {Dest}, {Shift1, Shift2}); in applyShiftOfShiftedLogic()
1593 MatchInfo.Shift2->eraseFromParent(); in applyShiftOfShiftedLogic()
|
| /llvm-project-15.0.7/llvm/test/tools/llvm-gsymutil/X86/ |
| H A D | elf-dwarf.yaml | 155 Shift2: 0x00000000
|
| /llvm-project-15.0.7/bolt/test/X86/Inputs/ |
| H A D | plt-got-sec.yaml | 122 Shift2: 0x0
|
| H A D | plt-sec.yaml | 122 Shift2: 0x0
|
| H A D | plt-sec-8-byte.yaml | 88 Shift2: 0x0
|
| /llvm-project-15.0.7/llvm/include/llvm/ObjectYAML/ |
| H A D | ELFYAML.h | 426 llvm::yaml::Hex32 Shift2; member
|
| /llvm-project-15.0.7/lld/ELF/ |
| H A D | SyntheticSections.h | 679 enum { Shift2 = 26 }; enumerator
|
| H A D | SyntheticSections.cpp | 2404 write32(buf + 12, Shift2); in writeTo()
2415 val |= uint64_t(1) << ((sym.hash >> Shift2) % c); in writeTo()
|
| /llvm-project-15.0.7/llvm/tools/obj2yaml/ |
| H A D | elf2yaml.cpp | 1306 Header.Shift2 = Data.getU32(Cur); in dumpGnuHashSection()
|
| /llvm-project-15.0.7/llvm/lib/ObjectYAML/ |
| H A D | ELFYAML.cpp | 1803 IO.mapRequired("Shift2", E.Shift2); in mapping()
|
| H A D | ELFEmitter.cpp | 1746 CBA.write<uint32_t>(Section.Header->Shift2, ELFT::TargetEndianness); in writeSectionContent()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.td | 4935 def Shift2 {
4941 dag Bits = (OR (AND Shift2.Right, MaskValues.Lo2),
4942 (AND Shift2.Left, MaskValues.Hi2));
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30011 SDValue Shift2 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, in LowerShift() local
30013 return DAG.getVectorShuffle(VT, dl, Shift1, Shift2, ShuffleMask); in LowerShift()
46195 SDValue Shift2 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in combineMulSpecial() local
46197 return DAG.getNode(ISD::ADD, DL, VT, Shift1, Shift2); in combineMulSpecial()
|