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Searched refs:ShTy (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp2612 EVT ShTy = N->getOperand(1).getValueType(); in ExpandShiftByConstant() local
2664 DAG.getConstant(NVTBits - 1, DL, ShTy)); in ExpandShiftByConstant()
2668 DAG.getConstant(NVTBits - 1, DL, ShTy)); in ExpandShiftByConstant()
2687 EVT ShTy = Amt.getValueType(); in ExpandShiftWithKnownAmountBit() local
2688 unsigned ShBits = ShTy.getScalarSizeInBits(); in ExpandShiftWithKnownAmountBit()
2709 Amt = DAG.getNode(ISD::AND, dl, ShTy, Amt, in ExpandShiftWithKnownAmountBit()
2736 SDValue Amt2 = DAG.getNode(ISD::XOR, dl, ShTy, Amt, in ExpandShiftWithKnownAmountBit()
2774 EVT ShTy = Amt.getValueType(); in ExpandShiftWithUnknownAmountBit() local
2784 SDValue NVBitsNode = DAG.getConstant(NVTBits, dl, ShTy); in ExpandShiftWithUnknownAmountBit()
2787 SDValue isShort = DAG.getSetCC(dl, getSetCCResultType(ShTy), in ExpandShiftWithUnknownAmountBit()
[all …]
H A DTargetLowering.cpp1732 EVT ShTy = getShiftAmountTy(InnerVT, DL); in SimplifyDemandedBits() local
1733 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits()
1734 ShTy = InnerVT; in SimplifyDemandedBits()
1737 TLO.DAG.getConstant(ShAmt, dl, ShTy)); in SimplifyDemandedBits()
H A DSelectionDAG.cpp2200 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout()); in getShiftAmountOperand() local
2201 if (OpTy == ShTy || OpTy.isVector()) return Op; in getShiftAmountOperand()
2203 return getZExtOrTrunc(Op, SDLoc(Op), ShTy); in getShiftAmountOperand()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp5722 LLT ShTy = MRI.getType(Z); in lowerFunnelShiftWithInverse() local
5735 auto Zero = MIRBuilder.buildConstant(ShTy, 0); in lowerFunnelShiftWithInverse()
5740 auto One = MIRBuilder.buildConstant(ShTy, 1); in lowerFunnelShiftWithInverse()
5749 Z = MIRBuilder.buildNot(ShTy, Z).getReg(0); in lowerFunnelShiftWithInverse()
5764 LLT ShTy = MRI.getType(Z); in lowerFunnelShiftAsShifts() local
5777 auto BitWidthC = MIRBuilder.buildConstant(ShTy, BW); in lowerFunnelShiftAsShifts()
5785 auto Mask = MIRBuilder.buildConstant(ShTy, BW - 1); in lowerFunnelShiftAsShifts()
5790 auto NotZ = MIRBuilder.buildNot(ShTy, Z); in lowerFunnelShiftAsShifts()
5793 auto BitWidthC = MIRBuilder.buildConstant(ShTy, BW); in lowerFunnelShiftAsShifts()
5798 auto One = MIRBuilder.buildConstant(ShTy, 1); in lowerFunnelShiftAsShifts()
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/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp3648 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedRegister() argument
3652 Op->RegShiftedReg.ShiftTy = ShTy; in CreateShiftedRegister()
3662 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedImmediate() argument
3665 Op->RegShiftedImm.ShiftTy = ShTy; in CreateShiftedImmediate()