Searched refs:SelectLoad (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 323 void SelectLoad(SDNode *N, unsigned NumVecs, unsigned Opc, 3878 SelectLoad(Node, 2, AArch64::LD2Rv8b, AArch64::dsub0); in Select() 3884 SelectLoad(Node, 2, AArch64::LD2Rv4h, AArch64::dsub0); in Select() 3887 SelectLoad(Node, 2, AArch64::LD2Rv8h, AArch64::qsub0); in Select() 3890 SelectLoad(Node, 2, AArch64::LD2Rv2s, AArch64::dsub0); in Select() 3893 SelectLoad(Node, 2, AArch64::LD2Rv4s, AArch64::qsub0); in Select() 3896 SelectLoad(Node, 2, AArch64::LD2Rv1d, AArch64::dsub0); in Select() 3899 SelectLoad(Node, 2, AArch64::LD2Rv2d, AArch64::qsub0); in Select() 3905 SelectLoad(Node, 3, AArch64::LD3Rv8b, AArch64::dsub0); in Select() 3911 SelectLoad(Node, 3, AArch64::LD3Rv4h, AArch64::dsub0); in Select() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.h | 93 void SelectLoad(SDNode *N);
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| H A D | HexagonISelDAGToDAG.cpp | 445 void HexagonDAGToDAGISel::SelectLoad(SDNode *N) { in SelectLoad() function in HexagonDAGToDAGISel 892 case ISD::LOAD: return SelectLoad(N); in Select()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 126 bool SelectLoad(const Instruction *I); 589 bool PPCFastISel::SelectLoad(const Instruction *I) { in SelectLoad() function in PPCFastISel 1945 return SelectLoad(I); in fastSelectInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 162 bool SelectLoad(const Instruction *I); 1004 bool ARMFastISel::SelectLoad(const Instruction *I) { in SelectLoad() function in ARMFastISel 2826 return SelectLoad(I); in fastSelectInstruction()
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