Searched refs:Sel2 (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/unittests/Frontend/ |
| H A D | OpenMPIRBuilderTest.cpp | 3792 SelectInst *Sel2 = dyn_cast<SelectInst>(Cmp1->getNextNode()); in TEST_F() local
3793 EXPECT_NE(Sel2, nullptr); in TEST_F()
3794 EXPECT_EQ(Sel2->getCondition(), Cmp1); in TEST_F()
3795 EXPECT_EQ(Sel2->getTrueValue(), Expr); in TEST_F()
3796 EXPECT_EQ(Sel2->getFalseValue(), ARWM2); in TEST_F()
3797 StoreInst *Store8 = dyn_cast<StoreInst>(Sel2->getNextNode()); in TEST_F()
3800 EXPECT_EQ(Store8->getValueOperand(), Sel2); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 2317 bool Sel2 = SelectVOP3PMadMixModsImpl(Src2, Src2, Src2Mods); in SelectFMAD_FMA() local
2324 if (Sel0 || Sel1 || Sel2) { in SelectFMAD_FMA()
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| H A D | AMDGPUISelLowering.cpp | 1847 SDValue Sel2 = DAG.getSelectCC(DL, C6, Zero, Sub3, Sub2, ISD::SETNE); in LowerUDIVREM64() local
1848 SDValue Rem = DAG.getSelectCC(DL, C3, Zero, Sel2, Sub1, ISD::SETNE); in LowerUDIVREM64()
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| H A D | AMDGPULegalizerInfo.cpp | 3633 auto Sel2 = B.buildSelect( in legalizeUnsignedDIV_REM64Impl() local
3636 Sel2, Sub1); in legalizeUnsignedDIV_REM64Impl()
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