Searched refs:SecondOpcode (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 49 unsigned FlagsHi, unsigned SecondOpcode);
161 unsigned SecondOpcode) { in expandAuipcInstPair() argument
179 BuildMI(NewMBB, DL, TII->get(SecondOpcode), DestReg) in expandAuipcInstPair()
211 unsigned SecondOpcode; in expandLoadAddress() local
215 SecondOpcode = STI.is64Bit() ? RISCV::LD : RISCV::LW; in expandLoadAddress()
218 SecondOpcode = RISCV::ADDI; in expandLoadAddress()
221 return expandAuipcInstPair(MBB, MBBI, NextMBBI, FlagsHi, SecondOpcode); in expandLoadAddress()
230 unsigned SecondOpcode = STI.is64Bit() ? RISCV::LD : RISCV::LW; in expandLoadTLSIEAddress() local
232 SecondOpcode); in expandLoadTLSIEAddress()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 113 unsigned SecondOpcode, SMLoc IDLoc, MCStreamer &Out);
2342 unsigned SecondOpcode, SMLoc IDLoc, in emitAuipcInstPair() argument
2360 emitToStreamer(Out, MCInstBuilder(SecondOpcode) in emitAuipcInstPair()
2393 unsigned SecondOpcode; in emitLoadAddress() local
2396 SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW; in emitLoadAddress()
2399 SecondOpcode = RISCV::ADDI; in emitLoadAddress()
2402 emitAuipcInstPair(DestReg, DestReg, Symbol, VKHi, SecondOpcode, IDLoc, Out); in emitLoadAddress()
2415 unsigned SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW; in emitLoadTLSIEAddress() local
2417 SecondOpcode, IDLoc, Out); in emitLoadTLSIEAddress()
2466 unsigned SecondOpcode = SignExtend ? RISCV::SRAI : RISCV::SRLI; in emitPseudoExtend() local
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