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Searched refs:Scl (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrFMA.td323 SchedWriteFMA.Scl>, VEX_LIG;
325 SchedWriteFMA.Scl>, VEX_LIG;
328 SchedWriteFMA.Scl>, VEX_LIG;
330 SchedWriteFMA.Scl>, VEX_LIG;
542 SchedWriteFMA.Scl>,
545 SchedWriteFMA.Scl>,
548 X86any_Fnmadd, loadf32, SchedWriteFMA.Scl>,
551 X86any_Fnmsub, loadf32, SchedWriteFMA.Scl>,
571 SchedWriteFMA.Scl>,
574 SchedWriteFMA.Scl>,
[all …]
H A DX86InstrAVX512.td5648 sched.PS.Scl>,
5653 sched.PD.Scl>,
5659 sched.PH.Scl>,
7055 EVEX_4V, Sched<[SchedWriteFMA.Scl.Folded, SchedWriteFMA.Scl.ReadAfterFold]>, SIMD_EXC;
7073 … [RHS_m]>, Sched<[SchedWriteFMA.Scl.Folded, SchedWriteFMA.Scl.ReadAfterFold]>, EVEX_4V, SIMD_EXC;
9441 SchedWriteFRcp.Scl>;
9443 SchedWriteFRsqrt.Scl>;
9447 SchedWriteFRnd.Scl>,
9449 SchedWriteFRnd.Scl>;
12688 Sched<[SchedWriteFMA.Scl.Folded]>;
[all …]
H A DX86InstrXOP.td78 ssmem, sse_load_f32, SchedWriteFRnd.Scl>;
87 sdmem, sse_load_f64, SchedWriteFRnd.Scl>;
H A DX86InstrSSE.td1851 SchedWriteFCmpSizes.PS.Scl, sse_load_f32>,
1856 SchedWriteFCmpSizes.PD.Scl, sse_load_f64>,
1863 SchedWriteFCmpSizes.PS.Scl, sse_load_f32>, XS;
1867 SchedWriteFCmpSizes.PD.Scl, sse_load_f64>, XD;
2665 sched.PS.Scl>, XS;
2668 sched.PD.Scl>, XD;
2687 SSEPackedSingle, sched.PS.Scl>, XS;
2690 SSEPackedDouble, sched.PD.Scl>, XD;
5624 defm VROUND : avx_fp_unop_rm<0x0A, 0x0B, "vround", SchedWriteFRnd.Scl>,
5649 defm ROUND : sse41_fp_unop_s<0x0A, 0x0B, "round", SchedWriteFRnd.Scl>;
[all …]
H A DX86Schedule.td82 X86FoldableSchedWrite Scl = sScl; // Scalar float/double operations.
118 X86SchedWriteMoveLS Scl = sScl; // Scalar float/double operations.
H A DX86ISelLowering.cpp8369 if (X86::isZeroNode(Scl)) { in getFauxShuffleMask()
8384 Scl = Scl.getOperand(0); in getFauxShuffleMask()
8397 SrcExtract = Scl; in getFauxShuffleMask()
41853 SDValue Scl = Op.getOperand(1); in SimplifyDemandedBitsForTargetNode() local
43465 SDValue Scl = SrcBC.getOperand(0); in combineExtractWithShuffle() local
43466 EVT SclVT = Scl.getValueType(); in combineExtractWithShuffle()
43468 Scl = DAG.getNode(ISD::SRL, dl, SclVT, Scl, in combineExtractWithShuffle()
43471 Scl = DAG.getZExtOrTrunc(Scl, dl, SrcVT.getScalarType()); in combineExtractWithShuffle()
43472 Scl = DAG.getZExtOrTrunc(Scl, dl, VT); in combineExtractWithShuffle()
43473 return Scl; in combineExtractWithShuffle()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp141 COFF::SymbolStorageClass Scl = Internal ? COFF::IMAGE_SYM_CLASS_STATIC in runOnMachineFunction() local
147 OutStreamer->emitCOFFSymbolStorageClass(Scl); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp160 COFF::SymbolStorageClass Scl = Internal ? COFF::IMAGE_SYM_CLASS_STATIC in runOnMachineFunction() local
165 OutStreamer->emitCOFFSymbolStorageClass(Scl); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1168 SDValue Scl = Op.getOperand(1); in SimplifyDemandedBits() local
1185 unsigned NumSclBits = Scl.getScalarValueSizeInBits(); in SimplifyDemandedBits()
1187 if (SimplifyDemandedBits(Scl, DemandedSclBits, KnownScl, TLO, Depth + 1)) in SimplifyDemandedBits()
3112 SDValue Scl = Op.getOperand(1); in SimplifyDemandedVectorElts() local
3128 KnownUndef.setBitVal(Idx, Scl.isUndef()); in SimplifyDemandedVectorElts()
3130 KnownZero.setBitVal(Idx, isNullConstant(Scl) || isNullFPConstant(Scl)); in SimplifyDemandedVectorElts()
H A DSelectionDAG.cpp2603 SDValue Scl; in isSplatValue() local
2612 if (Scl && Scl != Op) in isSplatValue()
2614 Scl = Op; in isSplatValue()