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/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dshrinkwrap.ll15 ; RV32I-SW-NO: # %bb.0:
23 ; RV32I-SW-NO-NEXT: ret
28 ; RV32I-SW: # %bb.0:
32 ; RV32I-SW-NEXT: ret
43 ; RV32I-SW-SR-NEXT: ret
49 ; RV64I-SW: # %bb.0:
54 ; RV64I-SW-NEXT: ret
92 ; RV32I-SW-NO-NEXT: ret
95 ; RV32I-SW: # %bb.0:
113 ; RV32I-SW-NEXT: ret
[all …]
H A Dmake-compressible.mir305 ; RV32-NEXT: SW $x13, killed renamable $x10, 0 :: (store (s32) into %ir.a)
306 ; RV32-NEXT: SW $x13, killed renamable $x11, 0 :: (store (s32) into %ir.b)
307 ; RV32-NEXT: SW $x13, killed renamable $x12, 0 :: (store (s32) into %ir.c)
313 ; RV64-NEXT: SW $x13, killed renamable $x10, 0 :: (store (s32) into %ir.a)
314 ; RV64-NEXT: SW $x13, killed renamable $x11, 0 :: (store (s32) into %ir.b)
317 SW $x0, killed renamable $x10, 0 :: (store (s32) into %ir.a)
318 SW $x0, killed renamable $x11, 0 :: (store (s32) into %ir.b)
319 SW $x0, killed renamable $x12, 0 :: (store (s32) into %ir.c)
433 ; RV32-NEXT: SW killed $x11, $x11, 0 :: (volatile store (s32) into %ir.q)
443 ; RV64-NEXT: SW killed $x11, $x11, 0 :: (volatile store (s32) into %ir.q)
[all …]
H A Dvector-abi.ll15 ; RV32: SW killed [[ADDI]], %stack.0, 12 :: (store (s32) into %stack.0)
17 ; RV32: SW killed [[ADDI1]], %stack.0, 8 :: (store (s32) into %stack.0)
19 ; RV32: SW killed [[ADDI2]], %stack.0, 4 :: (store (s32) into %stack.0)
21 ; RV32: SW killed [[ADDI3]], %stack.0, 0 :: (store (s32) into %stack.0)
H A Ddisjoint.ll16 ; CHECK:SU(2): SW %1:gpr, %0:gpr, 12 :: (store (s32) into %ir.arrayidx)
18 ; CHECK:SU(3): SW %1:gpr, %0:gpr, 8 :: (store (s32) into %ir.arrayidx1)
H A Dcopy-frameindex.mir52 ; CHECK-NEXT: SW $x0, killed [[ADDI]], 0 :: (volatile store (s32) into %stack.0)
64 SW $x0, killed %1:gpr, 0 :: (volatile store (s32) into %stack.0, align 4)
/llvm-project-15.0.7/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.cpp451 SW.startLine() in opcode_11101110()
465 SW.startLine() in opcode_11101111()
469 SW.startLine() in opcode_11101111()
526 SW.startLine() in opcode_11111000()
539 SW.startLine() in opcode_11111001()
554 SW.startLine() in opcode_11111010()
624 SW.startLine() << format( in opcode_save_fplr()
664 SW.startLine() << format( in opcode_save_regp()
811 SW.startLine() << format( in opcode_alloc_l()
831 SW.startLine() << format( in opcode_addfp()
[all …]
H A DWindowsResourceDumper.cpp57 SW.printString("Resource type (string)", NarrowStr); in printEntry()
62 SW.printString("Resource type (int)", IDStr); in printEntry()
67 SW.printString("Resource name (string)", NarrowStr); in printEntry()
69 SW.printNumber("Resource name (int)", Ref.getNameID()); in printEntry()
71 SW.printNumber("Data version", Ref.getDataVersion()); in printEntry()
72 SW.printHex("Memory flags", Ref.getMemoryFlags()); in printEntry()
73 SW.printNumber("Language ID", Ref.getLanguage()); in printEntry()
74 SW.printNumber("Version (major)", Ref.getMajorVersion()); in printEntry()
75 SW.printNumber("Version (minor)", Ref.getMinorVersion()); in printEntry()
78 SW.printBinary("Data:", Ref.getData()); in printEntry()
[all …]
H A DARMEHABIPrinter.h28 ScopedPrinter &SW; variable
65 OpcodeDecoder(ScopedPrinter &SW) : SW(SW), OS(SW.getOStream()) {} in OpcodeDecoder() argument
115 SW.startLine() in Decode_1000iiii_iiiiiiii()
221 SW.startLine() in Decode_11000111_0000iiii()
329 ScopedPrinter &SW; variable
357 : SW(SW), ELF(ELF), FileName(FileName), Symtab(Symtab) {} in PrinterContext()
514 ListScope OCC(SW, "Opcodes"); in PrintOpcodes()
541 ListScope E(SW, "Entries"); in PrintIndexTable()
543 DictScope E(SW, "Entry"); in PrintIndexTable()
571 SW.printHex("FunctionAddress", Address); in PrintIndexTable()
[all …]
H A DWin64EHDumper.cpp245 SW.printString("StartAddress", in printRuntimeFunctionEntry()
247 SW.printString("EndAddress", in printRuntimeFunctionEntry()
250 SW.printString("UnwindInfoAddress", in printRuntimeFunctionEntry()
316 DictScope UIS(SW, "UnwindInfo"); in printUnwindInfo()
317 SW.printNumber("Version", UI.getVersion()); in printUnwindInfo()
319 SW.printNumber("PrologSize", UI.PrologSize); in printUnwindInfo()
329 SW.printNumber("UnwindCodeCount", UI.NumCodes); in printUnwindInfo()
331 ListScope UCS(SW, "UnwindCodes"); in printUnwindInfo()
347 SW.printString("Handler", in printUnwindInfo()
352 DictScope CS(SW, "Chained"); in printUnwindInfo()
[all …]
H A DWin64EHDumper.h24 ScopedPrinter &SW; variable
55 Dumper(ScopedPrinter &SW) : SW(SW), OS(SW.getOStream()) {} in Dumper() argument
H A DWindowsResourceDumper.h21 Dumper(WindowsResource *Res, ScopedPrinter &SW) : SW(SW), WinRes(Res) {} in Dumper() argument
26 ScopedPrinter &SW;
H A DARMWinEHPrinter.h25 ScopedPrinter &SW; variable
180 Decoder(ScopedPrinter &SW, bool isAArch64) : SW(SW), in Decoder() argument
181 OS(SW.getOStream()), in Decoder()
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dremove-redundant-moves.ll9 ; CHECK: xscvsxddp 1, [[SW]]
23 ; CHECK-BE: xscvsxddp 1, [[SW]]
33 ; CHECK: xscvsxdsp 1, [[SW]]
57 ; CHECK: xscvuxddp 1, [[SW]]
81 ; CHECK: xscvuxdsp 1, [[SW]]
105 ; CHECK: xvcvsxwsp [[SW]], [[SW]]
106 ; CHECK: xscvspdpn 1, [[SW]]
120 ; CHECK: xvcvsxwsp [[SW]], [[SW]]
121 ; CHECK: xscvspdpn 1, [[SW]]
135 ; CHECK: xvcvsxwsp [[SW]], [[SW]]
[all …]
/llvm-project-15.0.7/mlir/python/mlir/dialects/linalg/opdsl/ops/
H A Dcore_named_ops.py259 strides=IndexAttrDef(S.SW, default=[1]),
349 S.OW * S.SW + S.KW * S.DW), argument
366 U, I[D.n, D.c, D.oh * S.SH + D.kh * S.DH, D.ow * S.SW +
371 S.OW * S.SW + S.KW * S.DW), argument
399 S.SW,
524 S.SW,
586 S.SW,
615 S.SW,
832 D.ow * S.SW + D.kw * S.DW, D.c])
860 D.ow * S.SW + D.kw * S.DW, D.c]))
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
H A Dvar_arg.mir62 ; MIPS32: SW [[COPY1]], [[ADDiu]], 0 :: (store (s32) into %fixed-stack.1)
65 ; MIPS32: SW [[COPY2]], [[ADDiu1]], 0 :: (store (s32) into %fixed-stack.2)
68 ; MIPS32: SW [[COPY3]], [[ADDiu2]], 0 :: (store (s32) into %fixed-stack.3)
75 ; MIPS32: SW [[COPY]], [[ADDiu4]], 0 :: (store (p0) into %ir.fmt.addr)
77 ; MIPS32: SW [[LEA_ADDiu]], [[ADDiu5]], 0
79 ; MIPS32: SW [[LW]], [[ADDiu6]], 0 :: (store (s32))
83 ; MIPS32: SW [[ADDu]], [[ADDiu6]], 0 :: (store (p0) into %ir.aq)
85 ; MIPS32: SW [[LW2]], [[ADDiu7]], 0 :: (store (p0) into %ir.s)
112 SW %19, %9(p0), 0 :: (store (s32))
/llvm-project-15.0.7/clang/lib/StaticAnalyzer/Checkers/
H A DGCDAntipatternChecker.cpp184 const auto *SW = Nodes.getNodeAs<CallExpr>(WarnAtNode); in emitDiagnostics() local
185 assert(SW); in emitDiagnostics()
199 PathDiagnosticLocation::createBegin(SW, BR.getSourceManager(), ADC), in emitDiagnostics()
200 SW->getSourceRange()); in emitDiagnostics()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVERegisterInfo.td105 def SW#I : VEReg<I, "sw"#I, [], ["s"#I]>, DwarfRegNum<[I]>;
108 // NOTE: Mark SF#I as alias of SW#I temporary to avoid register allocation
111 def SF#I : VEReg<I, "sf"#I, [], ["s"#I], [!cast<VEReg>("SW"#I)]>,
127 def SX#I : VEReg<I, "s"#I, [!cast<VEReg>("SW"#I), !cast<VEReg>("SF"#I)],
171 (add (sequence "SW%u", 0, 7),
172 (sequence "SW%u", 34, 63),
173 (sequence "SW%u", 8, 33))>;
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DMSP430AttributeParser.h36 MSP430AttributeParser(ScopedPrinter *SW) in MSP430AttributeParser() argument
37 : ELFAttributeParser(SW, MSP430Attrs::getMSP430AttributeTags(), in MSP430AttributeParser()
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/micromips-sizereduction/
H A Dmicromips-lwp-swp.mir67 SW killed $ra, $sp, 28 :: (store (s32) into %stack.0)
68 SW killed $s1, $sp, 24 :: (store (s32) into %stack.1)
69 SW killed $s0, $sp, 20 :: (store (s32) into %stack.2)
135 SW killed $ra, $sp, 28 :: (store (s32) into %stack.0)
203 SW killed $ra, $sp, 28 :: (store (s32) into %stack.0)
205 SW killed $s0, $sp, 20 :: (store (s32) into %stack.2)
271 SW killed $ra, $sp, 28 :: (store (s32) into %stack.0)
272 SW killed $s1, $sp, 24 :: (store (s32) into %stack.1)
H A Dmicromips-no-lwp-swp.mir62 SW killed $ra, $sp, 20 :: (store (s32) into %stack.0)
63 SW killed $s0, $sp, 16 :: (store (s32) into %stack.1)
181 SW killed $s0, $sp, 16 :: (store (s32) into %stack.1)
239 SW killed $ra, $sp, 20 :: (store (s32) into %stack.0)
/llvm-project-15.0.7/mlir/test/python/dialects/linalg/opdsl/
H A Darguments.py74 strides=IndexAttrDef(S.SH, S.SW, default=[1, 2])): argument
75 O[D.oh, D.ow] = I[D.oh * S.SH, D.ow * S.SW]
H A Demit_convolution.py19 strides=IndexAttrDef(S.SH, S.SW, default=[1, 1]), argument
23 U, I[D.n, D.oh * S.SH + D.kh * S.DH, D.ow * S.SW + D.kw * S.DW,
H A Demit_pooling.py21 strides=IndexAttrDef(S.SH, S.SW, default=[1, 1]), argument
25 cast(U, I[D.n, D.oh * S.SH + D.kh * S.DH, D.ow * S.SW + D.kw * S.DW,
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/Mips/
H A Ddbg-call-site-delay-slot-interpretation.mir102 SW killed $ra, $sp, 28 :: (store (s32) into %stack.0)
103 SW killed $s1, $sp, 24 :: (store (s32) into %stack.1)
104 SW killed $s0, $sp, 20 :: (store (s32) into %stack.2)
117 … SW killed renamable $at, killed renamable $s0, 0, debug-location !19 :: (store (s32) into %ir.adr)
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/compactbranches/
H A Dcompact-branch-implicit-def.mir112 SW $a0, $sp_64, 0 :: (store (s32) into %ir.a.addr)
137 SW killed $at, $sp_64, 4 :: (store (s32) into %ir.retval)
148 SW killed $v0, $sp_64, 4 :: (store (s32) into %ir.retval)

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