| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AddingConstrainedIntrinsics.rst | 57 STRICT_FP_ROUND. The new STRICT node will eventually be converted
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 464 STRICT_FP_ROUND, enumerator
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 107 case ISD::STRICT_FP_ROUND: in SoftenFloatResult() 838 case ISD::STRICT_FP_ROUND: in SoftenFloatOperand() 890 N->getOpcode() == ISD::STRICT_FP_ROUND); in SoftenFloatOp_FP_ROUND() 1795 case ISD::STRICT_FP_ROUND: in ExpandFloatOperand() 1918 SDValue Expansion = DAG.getNode(ISD::STRICT_FP_ROUND, SDLoc(N), in ExpandFloatOp_FP_ROUND() 2616 case ISD::STRICT_FP_ROUND: in SoftPromoteHalfResult()
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| H A D | SelectionDAGDumper.cpp | 348 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 2858 case ISD::STRICT_FP_ROUND: in ExpandNode() 4327 case ISD::STRICT_FP_ROUND: { in ConvertNodeToLibcall() 4778 Tmp1 = DAG.getNode(ISD::STRICT_FP_ROUND, dl, {OVT, MVT::Other}, in PromoteNode() 4803 Tmp4 = DAG.getNode(ISD::STRICT_FP_ROUND, dl, {OVT, MVT::Other}, in PromoteNode() 4829 Tmp3 = DAG.getNode(ISD::STRICT_FP_ROUND, dl, {OVT, MVT::Other}, in PromoteNode() 4875 Tmp3 = DAG.getNode(ISD::STRICT_FP_ROUND, dl, {OVT, MVT::Other}, in PromoteNode()
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| H A D | LegalizeVectorTypes.cpp | 671 case ISD::STRICT_FP_ROUND: in ScalarizeVectorOperand() 858 SDValue Res = DAG.getNode(ISD::STRICT_FP_ROUND, SDLoc(N), in ScalarizeVecOp_STRICT_FP_ROUND() 2700 case ISD::STRICT_FP_ROUND: in SplitVectorOperand() 3504 ISD::STRICT_FP_ROUND, DL, {OutVT, MVT::Other}, in SplitVecOp_TruncateHelper() 4091 case ISD::STRICT_FP_ROUND: in WidenVecRes_StrictFP() 5455 case ISD::STRICT_FP_ROUND: in WidenVectorOperand() 5645 if (Opcode == ISD::STRICT_FP_ROUND) in WidenVecOp_Convert()
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| H A D | SelectionDAG.cpp | 1355 : getNode(ISD::STRICT_FP_ROUND, DL, {VT, MVT::Other}, in getStrictFPExtendOrRound() 9115 case ISD::STRICT_FP_ROUND: in getNode()
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| H A D | SelectionDAGBuilder.cpp | 7345 case ISD::STRICT_FP_ROUND: in visitConstrainedFPIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1048 case ISD::STRICT_FP_ROUND: in PreprocessISelDAG() 1062 case ISD::STRICT_FP_ROUND: NewOpc = X86ISD::STRICT_VFPROUND; break; in PreprocessISelDAG() 1332 case ISD::STRICT_FP_ROUND: in PreprocessISelDAG() 1363 MVT MemVT = (N->getOpcode() == ISD::STRICT_FP_ROUND) ? DstVT : SrcVT; in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 662 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f16, LibCall); in X86TargetLowering() 756 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Legal); in X86TargetLowering() 757 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f64, Legal); in X86TargetLowering() 815 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f80, Legal); in X86TargetLowering() 856 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Custom); in X86TargetLowering() 860 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f64, Custom); in X86TargetLowering() 1564 setOperationAction(ISD::STRICT_FP_ROUND, VT, Custom); in X86TargetLowering() 2374 ISD::STRICT_FP_ROUND}); in X86TargetLowering() 20960 ISD::STRICT_FP_ROUND, dl, {VT, MVT::Other}, in promoteXINT_TO_FP() 33078 case ISD::STRICT_FP_ROUND: in ReplaceNodeResults() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 347 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Legal); in PPCTargetLowering() 1222 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f64, Legal); in PPCTargetLowering() 1223 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Legal); in PPCTargetLowering() 1262 setOperationAction(ISD::STRICT_FP_ROUND, VT, Custom); in PPCTargetLowering() 8659 FP = DAG.getNode(ISD::STRICT_FP_ROUND, dl, in LowerINT_TO_FP() 8740 FP = DAG.getNode(ISD::STRICT_FP_ROUND, dl, in LowerINT_TO_FP() 11200 case ISD::STRICT_FP_ROUND: in LowerOperation()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 485 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f16, Custom); in AArch64TargetLowering() 486 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Custom); in AArch64TargetLowering() 487 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f64, Custom); in AArch64TargetLowering() 973 ISD::STRICT_SINT_TO_FP, ISD::STRICT_UINT_TO_FP, ISD::STRICT_FP_ROUND}) in AArch64TargetLowering() 1537 setOperationAction(ISD::STRICT_FP_ROUND, VT, Legal); in addTypeForNEON() 4004 ISD::STRICT_FP_ROUND, dl, {VT, MVT::Other}, in LowerVectorINT_TO_FP() 4051 ISD::STRICT_FP_ROUND, dl, {MVT::f16, MVT::Other}, in LowerINT_TO_FP() 5440 case ISD::STRICT_FP_ROUND: in LowerOperation()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 485 setOperationAction(ISD::STRICT_FP_ROUND, VT, Legal); in SystemZTargetLowering() 654 ISD::STRICT_FP_ROUND, in SystemZTargetLowering() 7138 case ISD::STRICT_FP_ROUND: in PerformDAGCombine()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 579 def strict_fpround : SDNode<"ISD::STRICT_FP_ROUND",
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 324 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f16, Legal); in RISCVTargetLowering() 362 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Legal); in RISCVTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1068 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f32, Custom); in ARMTargetLowering() 1076 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f16, Custom); in ARMTargetLowering() 10444 case ISD::STRICT_FP_ROUND: in LowerOperation()
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