Searched refs:STRICT_FDIV (Results 1 – 10 of 10) sorted by relevance
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 403 STRICT_FDIV, enumerator
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 264 case ISD::STRICT_FDIV: return "strict_fdiv"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 84 case ISD::STRICT_FDIV: in SoftenFloatResult()
1228 case ISD::STRICT_FDIV: in ExpandFloatResult()
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| H A D | LegalizeDAG.cpp | 4184 case ISD::STRICT_FDIV: in ConvertNodeToLibcall()
4765 case ISD::STRICT_FDIV: in PromoteNode()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 481 setOperationAction(ISD::STRICT_FDIV, VT, Legal); in SystemZTargetLowering()
531 setOperationAction(ISD::STRICT_FDIV, MVT::v2f64, Legal); in SystemZTargetLowering()
588 setOperationAction(ISD::STRICT_FDIV, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 527 def strict_fdiv : SDNode<"ISD::STRICT_FDIV",
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 346 setOperationAction(ISD::STRICT_FDIV, MVT::f32, Legal); in PPCTargetLowering()
352 setOperationAction(ISD::STRICT_FDIV, MVT::f64, Legal); in PPCTargetLowering()
1128 setOperationAction(ISD::STRICT_FDIV, MVT::v4f32, Legal); in PPCTargetLowering()
1142 setOperationAction(ISD::STRICT_FDIV, MVT::v2f64, Legal); in PPCTargetLowering()
1218 setOperationAction(ISD::STRICT_FDIV, MVT::f128, Legal); in PPCTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 640 setOperationAction(ISD::STRICT_FDIV, MVT::f16, Promote); in X86TargetLowering()
754 setOperationAction(ISD::STRICT_FDIV, MVT::f32, Legal); in X86TargetLowering()
755 setOperationAction(ISD::STRICT_FDIV, MVT::f64, Legal); in X86TargetLowering()
805 setOperationAction(ISD::STRICT_FDIV , MVT::f80, Legal); in X86TargetLowering()
830 setOperationAction(ISD::STRICT_FDIV, MVT::f128, LibCall); in X86TargetLowering()
996 setOperationAction(ISD::STRICT_FDIV, MVT::v4f32, Legal); in X86TargetLowering()
1206 setOperationAction(ISD::STRICT_FDIV, MVT::v2f64, Legal); in X86TargetLowering()
1377 setOperationAction(ISD::STRICT_FDIV, MVT::v8f32, Legal); in X86TargetLowering()
1703 setOperationAction(ISD::STRICT_FDIV, MVT::v16f32, Legal); in X86TargetLowering()
1704 setOperationAction(ISD::STRICT_FDIV, MVT::v8f64, Legal); in X86TargetLowering()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 612 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in AArch64TargetLowering()
696 ISD::STRICT_FDIV, ISD::STRICT_FMA, ISD::STRICT_FSQRT}) { in AArch64TargetLowering()
961 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in AArch64TargetLowering()
1529 ISD::STRICT_FMUL, ISD::STRICT_FDIV, ISD::STRICT_FMA, in addTypeForNEON()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 307 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in RISCVTargetLowering()
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