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Searched refs:SRLW (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVSExtWRemoval.cpp111 case RISCV::SRLW: in isAllUsesReadW()
208 case RISCV::SRLW: in isSignExtendingOpW()
H A DRISCVISelLowering.h65 SRLW, enumerator
H A DRISCVInstrInfo.td74 def riscv_srlw : SDNode<"RISCVISD::SRLW", SDT_RISCVIntBinOpW>;
743 def SRLW : ALUW_rr<0b0000000, 0b101, "srlw">,
1614 def : PatGprGpr<shiftopw<riscv_srlw>, SRLW>;
H A DRISCVISelDAGToDAG.cpp2159 case RISCV::SRLW: in hasAllNBitUsers()
H A DRISCVISelLowering.cpp6792 return RISCVISD::SRLW; in getRISCVWOpcode()
8890 case RISCVISD::SRLW: { in PerformDAGCombine()
9667 case RISCVISD::SRLW: in ComputeNumSignBitsForTargetNode()
11622 NODE_NAME_CASE(SRLW) in getTargetNodeName()