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Searched refs:SMAX (Results 1 – 25 of 93) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-smax.mir18 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:sgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
38 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY2]], [[COPY1]]
58 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY2]]
59 ; CHECK-NEXT: $vgpr0 = COPY [[SMAX]](s32)
81 ; CHECK-NEXT: $vgpr0 = COPY [[SMAX]](s32)
103 ; CHECK-NEXT: $vgpr0 = COPY [[SMAX]](s32)
128 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[SMAX]](s32)
159 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:sgpr(s16) = G_TRUNC [[SMAX]](s32)
218 ; CHECK-NEXT: $vgpr0 = COPY [[SMAX]](<2 x s16>)
240 ; CHECK-NEXT: $vgpr0 = COPY [[SMAX]](<2 x s16>)
[all …]
H A Dlegalize-smax.mir19 ; SI-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[COPY]], [[COPY1]]
20 ; SI-NEXT: $vgpr0 = COPY [[SMAX]](s32)
26 ; VI-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[COPY]], [[COPY1]]
27 ; VI-NEXT: $vgpr0 = COPY [[SMAX]](s32)
34 ; GFX9-NEXT: $vgpr0 = COPY [[SMAX]](s32)
91 ; SI-NEXT: $vgpr0 = COPY [[SMAX]](s32)
135 ; SI-NEXT: $vgpr0 = COPY [[SMAX]](s32)
186 ; SI-NEXT: $vgpr0 = COPY [[SMAX]](s32)
195 ; VI-NEXT: $vgpr0 = COPY [[SMAX]](s32)
204 ; GFX9-NEXT: $vgpr0 = COPY [[SMAX]](s32)
[all …]
H A Dlegalize-saddsat.mir25 ; GFX6-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SHL]], [[C3]]
26 ; GFX6-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SMAX]]
47 ; GFX8-NEXT: [[SMAX:%[0-9]+]]:_(s16) = G_SMAX [[SHL]], [[C3]]
48 ; GFX8-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[C1]], [[SMAX]]
97 ; GFX6-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SHL]], [[C3]]
98 ; GFX6-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SMAX]]
119 ; GFX8-NEXT: [[SMAX:%[0-9]+]]:_(s16) = G_SMAX [[SHL]], [[C3]]
120 ; GFX8-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[C1]], [[SMAX]]
173 ; GFX6-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SMAX]]
218 ; GFX8-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[C2]], [[SMAX]]
[all …]
H A Dlegalize-ssubsat.mir25 ; GFX6-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SHL]], [[C3]]
26 ; GFX6-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[SMAX]], [[C1]]
47 ; GFX8-NEXT: [[SMAX:%[0-9]+]]:_(s16) = G_SMAX [[SHL]], [[C3]]
48 ; GFX8-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[SMAX]], [[C1]]
97 ; GFX6-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SHL]], [[C3]]
98 ; GFX6-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[SMAX]], [[C1]]
119 ; GFX8-NEXT: [[SMAX:%[0-9]+]]:_(s16) = G_SMAX [[SHL]], [[C3]]
120 ; GFX8-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[SMAX]], [[C1]]
173 ; GFX6-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[SMAX]], [[C2]]
218 ; GFX8-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[SMAX]], [[C2]]
[all …]
H A Dregbankcombiner-smed3.mir273 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:vgpr(<2 x s16>) = G_SMAX [[COPY2]], [[SMIN]]
274 ; CHECK-NEXT: $vgpr0 = COPY [[SMAX]](<2 x s16>)
303 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:sgpr(s32) = G_SMAX [[COPY]], [[C]]
305 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:sgpr(s32) = G_SMIN [[SMAX]], [[C1]]
H A Dlegalize-fptrunc.mir127 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SUB]], [[C6]]
129 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SMAX]], [[C11]]
208 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SUB]], [[C6]]
210 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SMAX]], [[C11]]
335 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SUB]], [[C6]]
337 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SMAX]], [[C11]]
416 ; CHECK-NEXT: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX [[SUB]], [[C6]]
418 ; CHECK-NEXT: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SMAX]], [[C11]]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dvector-geps.ll10 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
11 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4
14 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775804
28 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
64 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
65 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4
68 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775804
82 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
H A Dloop-scalars.ll12 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
13 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2
16 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775806
30 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
66 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 2)
67 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
126 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 2)
127 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
192 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2
195 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775806
[all …]
H A Dinterleaved-accesses-pred-stores.ll20 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
21 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 3
24 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1
27 ; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]]
115 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
116 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 3
119 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1
122 ; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]]
224 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 3
227 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1
[all …]
H A Dinvariant-store-vectorization-2.ll28 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)
29 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[SMAX]]
130 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)
131 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[SMAX]]
221 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)
222 ; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[SMAX]]
H A Dloop-form.ll10 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
11 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
48 ; TAILFOLD-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
49 ; TAILFOLD-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
119 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
120 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
326 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
408 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
492 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
577 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
[all …]
H A Dinduction.ll666 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 2
722 ; IND-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
914 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
976 ; IND-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
1036 ; UNROLL-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
1196 ; INTERLEAVE-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
1300 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 2
1514 ; INTERLEAVE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 7
2028 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SMAX]], 2
2099 ; IND-NEXT: [[N_VEC:%.*]] = and i32 [[SMAX]], 2147483646
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A D2007-08-06-MisinterpretBranch.ll10 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[Y:%.*]], i32 [[TMP0]])
11 ; CHECK-NEXT: [[X_ADDR_1:%.*]] = select i1 [[TMP3]], i32 [[X]], i32 [[SMAX]]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dselect_meta.ll133 ; SMAX(SMAX(x, y), x) -> SMAX(x, y)
146 ; SMAX(SMAX(75, X), 36) -> SMAX(X, 75)
174 ; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dfull_widening.ll10 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[K:%.*]], i32 1)
11 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[SMAX]] to i64
H A Drewrite-loop-exit-value.ll173 ; CHECK-NEXT: [[SMAX:%.*]] = add nsw i16 [[TMP0]], 1
174 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i16 [[SMAX]], 0
176 ; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i16 [[SMAX]], [[UMIN]]
H A Delim-extend.ll11 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[LIMIT:%.*]], i32 0)
12 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
117 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[LIMIT]], i32 1)
118 ; CHECK-NEXT: [[WIDE_TRIP_COUNT4:%.*]] = zext i32 [[SMAX]] to i64
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/X86/
H A Deliminate-trunc.ll39 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
40 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
68 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 2147483646)
69 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
120 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 -2147483647)
121 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SMAX]], 1
379 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
380 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[SMAX]], 1
547 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N]], i32 1)
548 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[SMAX]] to i64
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVVPNodes.def85 HELPER_REDUCTION(SMAX, SMAX)
/llvm-project-15.0.7/llvm/test/Transforms/IRCE/
H A Drc-negative-bound.ll116 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 0)
117 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[BOUND]], [[SMAX]]
206 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[SMIN]], i32 -1)
207 ; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[SMAX]], 1
396 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 0)
397 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[BOUND]], [[SMAX]]
488 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[SMIN]], i32 -1)
489 ; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[SMAX]], 1
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dinvariant-store-vectorization.ll19 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)
20 ; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[SMAX]]
137 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)
138 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[SMAX]]
253 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1)
254 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[SMAX]]
256 ; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i32, i32* [[C:%.*]], i64 [[SMAX]]
H A Dx86-predication.ll244 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
245 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2
248 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 2
249 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]
293 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
321 ; SINK-GATHER-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
322 ; SINK-GATHER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 8
325 ; SINK-GATHER-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 8
326 ; SINK-GATHER-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]
442 ; SINK-GATHER-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/
H A Dscalable-avoid-scalarization.ll15 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 [[TMP0]])
16 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[SMAX]], [[IDX]]
/llvm-project-15.0.7/llvm/test/Transforms/LoopBoundSplit/
H A Dloop-bound-split.ll64 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 0)
65 ; CHECK-NEXT: [[NEW_BOUND:%.*]] = call i64 @llvm.smin.i64(i64 [[SMAX]], i64 [[B]])
145 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 0)
146 ; CHECK-NEXT: [[NEW_BOUND:%.*]] = call i64 @llvm.smin.i64(i64 [[SMAX]], i64 10)
401 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
402 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
530 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
531 ; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[SMAX]], 1
880 ; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 0)
881 ; CHECK-NEXT: [[NEW_BOUND:%.*]] = call i64 @llvm.smin.i64(i64 [[SMAX]], i64 10)
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dvec_minmax_match.ll162 ; (X <s C1) ? C1 : SMIN(X, C2) ==> SMAX(SMIN(X, C2), C1)
177 ; (X >s C1) ? C1 : SMAX(X, C2) ==> SMIN(SMAX(X, C2), C1)

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