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/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Datomic-idempotent.ll28 ; X86-SLM-LABEL: add8:
29 ; X86-SLM: # %bb.0:
34 ; X86-SLM-NEXT: retl
63 ; X86-SLM-LABEL: or16:
64 ; X86-SLM: # %bb.0:
73 ; X86-SLM-NEXT: retl
104 ; X86-SLM-LABEL: xor32:
114 ; X86-SLM-NEXT: retl
217 ; X86-SLM-LABEL: or128:
315 ; X86-SLM-LABEL: and32:
[all …]
H A Dmovbe.ll14 ; SLM-LABEL: test1:
15 ; SLM: movbew %si, (%rdi)
24 ; SLM-LABEL: test2:
25 ; SLM: movbew (%rdi), %ax
34 ; SLM-LABEL: test3:
35 ; SLM: movbel %esi, (%rdi)
44 ; SLM-LABEL: test4:
45 ; SLM: movbel (%rdi), %eax
54 ; SLM-LABEL: test5:
55 ; SLM: movbeq %rsi, (%rdi)
[all …]
H A Dbypass-slow-division-tune.ll84 ; SLM-LABEL: div64:
91 ; SLM-NEXT: # %bb.2:
92 ; SLM-NEXT: cqto
94 ; SLM-NEXT: retq
95 ; SLM-NEXT: .LBB1_1:
100 ; SLM-NEXT: retq
208 ; SLM: # %bb.0:
214 ; SLM-NEXT: # %bb.2:
215 ; SLM-NEXT: cqto
217 ; SLM-NEXT: retq
[all …]
H A Dslow-pmulld.ll103 ; SLM: # %bb.0:
200 ; SLM: # %bb.0:
319 ; SLM: # %bb.0:
376 ; SLM: # %bb.0:
438 ; SLM: # %bb.0:
627 ; SLM: # %bb.0:
724 ; SLM: # %bb.0:
867 ; SLM: # %bb.0:
912 ; SLM: # %bb.0:
1005 ; SLM-32: {{.*}}
[all …]
H A Dmul-constant-i32.ll319 ; X64-SLM-NEXT: retq
387 ; X64-SLM-NEXT: retq
571 ; X64-SLM-NEXT: retq
639 ; X64-SLM-NEXT: retq
682 ; X64-SLM-NEXT: retq
725 ; X64-SLM-NEXT: retq
824 ; X64-SLM-NEXT: retq
895 ; X64-SLM-NEXT: retq
941 ; X64-SLM-NEXT: retq
1069 ; X64-SLM-NEXT: retq
[all …]
H A Dmul-constant-i64.ll316 ; X64-SLM-NEXT: retq
392 ; X64-SLM-NEXT: retq
599 ; X64-SLM-NEXT: retq
675 ; X64-SLM-NEXT: retq
722 ; X64-SLM-NEXT: retq
769 ; X64-SLM-NEXT: retq
881 ; X64-SLM-NEXT: retq
961 ; X64-SLM-NEXT: retq
1011 ; X64-SLM-NEXT: retq
1153 ; X64-SLM-NEXT: retq
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dslm-arith-costs.ll49 ; SLM-LABEL: 'slm-costs_8_v2_mul'
63 ; SLM-LABEL: 'slm-costs_8_v4_mul'
511 ; SLM-LABEL: 'slm-costs_mulsd'
526 ; SLM-LABEL: 'slm-costs_mulpd'
541 ; SLM-LABEL: 'slm-costs_mulps'
556 ; SLM-LABEL: 'slm-costs_divss'
571 ; SLM-LABEL: 'slm-costs_divps'
586 ; SLM-LABEL: 'slm-costs_divsd'
601 ; SLM-LABEL: 'slm-costs_divpd'
616 ; SLM-LABEL: 'slm-costs_addpd'
[all …]
H A Dfptosi.ll49 ; SLM-LABEL: 'fptosi_double_i64'
54 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
99 ; SLM-LABEL: 'fptosi_double_i32'
104 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
142 ; SLM-LABEL: 'fptosi_double_i16'
147 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
185 ; SLM-LABEL: 'fptosi_double_i8'
240 ; SLM-LABEL: 'fptosi_float_i64'
297 ; SLM-LABEL: 'fptosi_float_i32'
354 ; SLM-LABEL: 'fptosi_float_i16'
[all …]
H A Dfptoui.ll56 ; SLM-LABEL: 'fptoui_double_i64'
61 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
106 ; SLM-LABEL: 'fptoui_double_i32'
111 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
149 ; SLM-LABEL: 'fptoui_double_i16'
154 ; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
192 ; SLM-LABEL: 'fptoui_double_i8'
255 ; SLM-LABEL: 'fptoui_float_i64'
312 ; SLM-LABEL: 'fptoui_float_i32'
369 ; SLM-LABEL: 'fptoui_float_i16'
[all …]
H A Dreduction.ll45 ; SLM-LABEL: 'reduction_cost_float'
93 ; SLM-LABEL: 'reduction_cost_int'
165 ; SLM-LABEL: 'pairwise_hadd'
237 ; SLM-LABEL: 'pairwise_hadd_assoc'
305 ; SLM-LABEL: 'pairwise_hadd_skip_first'
834 ; SLM-LABEL: 'pairwise_reduction4float'
1028 ; SLM-LABEL: 'pairwise_reduction2i64'
1054 ; SLM-LABEL: 'pairwise_reduction4i32'
1106 ; SLM-LABEL: 'pairwise_reduction4i64'
1180 ; SLM-LABEL: 'pairwise_reduction8i16'
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dzext.ll24 ; SLM-LABEL: @loadext_2i8_to_2i64(
28 ; SLM-NEXT: ret <2 x i64> [[TMP3]]
53 ; SLM-LABEL: @loadext_4i8_to_4i32(
57 ; SLM-NEXT: ret <4 x i32> [[TMP3]]
90 ; SLM-LABEL: @loadext_4i8_to_4i64(
94 ; SLM-NEXT: ret <4 x i64> [[TMP3]]
127 ; SLM-LABEL: @loadext_8i8_to_8i16(
180 ; SLM-LABEL: @loadext_8i8_to_8i32(
322 ; SLM-LABEL: @loadext_2i16_to_2i64(
351 ; SLM-LABEL: @loadext_4i16_to_4i32(
[all …]
H A Dzext-inseltpoison.ll24 ; SLM-LABEL: @loadext_2i8_to_2i64(
28 ; SLM-NEXT: ret <2 x i64> [[TMP3]]
53 ; SLM-LABEL: @loadext_4i8_to_4i32(
57 ; SLM-NEXT: ret <4 x i32> [[TMP3]]
90 ; SLM-LABEL: @loadext_4i8_to_4i64(
94 ; SLM-NEXT: ret <4 x i64> [[TMP3]]
127 ; SLM-LABEL: @loadext_8i8_to_8i16(
180 ; SLM-LABEL: @loadext_8i8_to_8i32(
322 ; SLM-LABEL: @loadext_2i16_to_2i64(
351 ; SLM-LABEL: @loadext_4i16_to_4i32(
[all …]
H A Dalternate-calls.ll31 ; SLM-LABEL: @ceil_floor(
32 ; SLM-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0
33 ; SLM-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3
34 ; SLM-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]])
36 ; SLM-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]])
37 ; SLM-NEXT: [[AB3:%.*]] = call float @llvm.ceil.f32(float [[A3]])
39 ; SLM-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]])
41 ; SLM-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]])
42 ; SLM-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i64 0
45 ; SLM-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3
[all …]
H A Dalternate-calls-inseltpoison.ll31 ; SLM-LABEL: @ceil_floor(
32 ; SLM-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0
33 ; SLM-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3
34 ; SLM-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]])
36 ; SLM-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]])
37 ; SLM-NEXT: [[AB3:%.*]] = call float @llvm.ceil.f32(float [[A3]])
39 ; SLM-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]])
41 ; SLM-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]])
42 ; SLM-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i64 0
45 ; SLM-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3
[all …]
H A Darith-fp-inseltpoison.ll67 ; SLM-LABEL: @buildvector_div_2f64(
72 ; SLM-NEXT: [[C0:%.*]] = fdiv double [[A0]], [[B0]]
73 ; SLM-NEXT: [[C1:%.*]] = fdiv double [[A1]], [[B1]]
76 ; SLM-NEXT: ret <2 x double> [[R1]]
274 ; SLM-LABEL: @buildvector_div_4f64(
283 ; SLM-NEXT: [[C0:%.*]] = fdiv double [[A0]], [[B0]]
284 ; SLM-NEXT: [[C1:%.*]] = fdiv double [[A1]], [[B1]]
285 ; SLM-NEXT: [[C2:%.*]] = fdiv double [[A2]], [[B2]]
291 ; SLM-NEXT: ret <4 x double> [[R3]]
609 ; SLM-LABEL: @buildvector_div_8f64(
[all …]
H A Darith-fp.ll67 ; SLM-LABEL: @buildvector_div_2f64(
72 ; SLM-NEXT: [[C0:%.*]] = fdiv double [[A0]], [[B0]]
73 ; SLM-NEXT: [[C1:%.*]] = fdiv double [[A1]], [[B1]]
76 ; SLM-NEXT: ret <2 x double> [[R1]]
274 ; SLM-LABEL: @buildvector_div_4f64(
283 ; SLM-NEXT: [[C0:%.*]] = fdiv double [[A0]], [[B0]]
284 ; SLM-NEXT: [[C1:%.*]] = fdiv double [[A1]], [[B1]]
285 ; SLM-NEXT: [[C2:%.*]] = fdiv double [[A2]], [[B2]]
291 ; SLM-NEXT: ret <4 x double> [[R3]]
609 ; SLM-LABEL: @buildvector_div_8f64(
[all …]
H A Darith-div.ll41 ; SLM-LABEL: @sdiv_v16i32_uniformconst(
43 ; SLM-NEXT: [[TMP2:%.*]] = sdiv <4 x i32> [[TMP1]], <i32 5, i32 5, i32 5, i32 5>
46 ; SLM-NEXT: [[TMP4:%.*]] = sdiv <4 x i32> [[TMP3]], <i32 5, i32 5, i32 5, i32 5>
49 ; SLM-NEXT: [[TMP6:%.*]] = sdiv <4 x i32> [[TMP5]], <i32 5, i32 5, i32 5, i32 5>
54 ; SLM-NEXT: ret void
138 ; SLM-LABEL: @srem_v16i32_uniformconst(
151 ; SLM-NEXT: ret void
235 ; SLM-LABEL: @udiv_v16i32_uniformconst(
248 ; SLM-NEXT: ret void
332 ; SLM-LABEL: @urem_v16i32_uniformconst(
[all …]
H A Darith-fix.ll48 ; SLM-LABEL: @smul_v8i64(
65 ; SLM-NEXT: ret void
170 ; SLM-LABEL: @smul_v16i32(
235 ; SLM-NEXT: ret void
359 ; SLM-NEXT: ret void
530 ; SLM-LABEL: @smul_v64i8(
547 ; SLM-NEXT: ret void
868 ; SLM-NEXT: ret void
1038 ; SLM-NEXT: ret void
1162 ; SLM-NEXT: ret void
[all …]
H A Dalternate-int.ll112 ; SLM-LABEL: @ashr_shl_v8i32(
116 ; SLM-NEXT: ret <8 x i32> [[TMP3]]
180 ; SLM-LABEL: @ashr_shl_v8i32_const(
184 ; SLM-NEXT: ret <8 x i32> [[TMP3]]
253 ; SLM-LABEL: @ashr_lshr_shl_v8i32(
265 ; SLM-NEXT: ret <8 x i32> [[R71]]
398 ; SLM-LABEL: @sdiv_v8i32_undefs(
405 ; SLM-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4
406 ; SLM-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8
408 ; SLM-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4
[all …]
H A Dalternate-int-inseltpoison.ll112 ; SLM-LABEL: @ashr_shl_v8i32(
116 ; SLM-NEXT: ret <8 x i32> [[TMP3]]
180 ; SLM-LABEL: @ashr_shl_v8i32_const(
184 ; SLM-NEXT: ret <8 x i32> [[TMP3]]
253 ; SLM-LABEL: @ashr_lshr_shl_v8i32(
265 ; SLM-NEXT: ret <8 x i32> [[R71]]
398 ; SLM-LABEL: @sdiv_v8i32_undefs(
405 ; SLM-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4
406 ; SLM-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8
408 ; SLM-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4
[all …]
H A Dalternate-fp-inseltpoison.ll3 …lm -basic-aa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
98 ; SLM-LABEL: @fmul_fdiv_v4f32_const(
99 ; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A:%.*]], i64 2
100 ; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i64 3
101 ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> <i32 0,…
102 ; SLM-NEXT: [[TMP2:%.*]] = fmul <2 x float> [[TMP1]], <float 2.000000e+00, float 1.000000e+00>
103 ; SLM-NEXT: [[AB3:%.*]] = fmul float [[A3]], 2.000000e+00
104 ; SLM-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i3…
105 ; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[TMP3]], float [[A2]], i64 2
106 ; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i64 3
[all …]
H A Dalternate-fp.ll3 …lm -basic-aa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
98 ; SLM-LABEL: @fmul_fdiv_v4f32_const(
99 ; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A:%.*]], i64 2
100 ; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i64 3
101 ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> <i32 0,…
102 ; SLM-NEXT: [[TMP2:%.*]] = fmul <2 x float> [[TMP1]], <float 2.000000e+00, float 1.000000e+00>
103 ; SLM-NEXT: [[AB3:%.*]] = fmul float [[A3]], 2.000000e+00
104 ; SLM-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i3…
105 ; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[TMP3]], float [[A2]], i64 2
106 ; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i64 3
[all …]
H A Darith-add.ll45 ; SLM-LABEL: @add_v8i64(
48 ; SLM-NEXT: [[TMP3:%.*]] = add <2 x i64> [[TMP1]], [[TMP2]]
52 ; SLM-NEXT: [[TMP6:%.*]] = add <2 x i64> [[TMP4]], [[TMP5]]
56 ; SLM-NEXT: [[TMP9:%.*]] = add <2 x i64> [[TMP7]], [[TMP8]]
62 ; SLM-NEXT: ret void
137 ; SLM-LABEL: @add_v16i32(
154 ; SLM-NEXT: ret void
261 ; SLM-LABEL: @add_v32i16(
278 ; SLM-NEXT: ret void
449 ; SLM-LABEL: @add_v64i8(
[all …]
H A Darith-sub.ll45 ; SLM-LABEL: @sub_v8i64(
48 ; SLM-NEXT: [[TMP3:%.*]] = sub <2 x i64> [[TMP1]], [[TMP2]]
52 ; SLM-NEXT: [[TMP6:%.*]] = sub <2 x i64> [[TMP4]], [[TMP5]]
56 ; SLM-NEXT: [[TMP9:%.*]] = sub <2 x i64> [[TMP7]], [[TMP8]]
62 ; SLM-NEXT: ret void
137 ; SLM-LABEL: @sub_v16i32(
154 ; SLM-NEXT: ret void
261 ; SLM-LABEL: @sub_v32i16(
278 ; SLM-NEXT: ret void
449 ; SLM-LABEL: @sub_v64i8(
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dmul_slm_16bit.ll35 ; SLM: cost of 3 for VF 2 {{.*}} mul nsw i32 %conv3, %conv
39 ; SLM: cost of 2 for VF 2 {{.*}} mul nsw i32 %conv4, %conv
45 ; SLM: cost of 2 for VF 2 {{.*}} mul nsw i32 %conv5, %conv4
51 ; SLM: cost of 3 for VF 2 {{.*}} mul nsw i32 -120, %conv3
56 ; SLM: cost of 2 for VF 2 {{.*}} mul nsw i32 250, %conv3
61 ; SLM: cost of 2 for VF 2 {{.*}} mul nsw i32 -120, %conv4
66 ; SLM: cost of 2 for VF 2 {{.*}} mul nsw i32 250, %conv4
104 ; SLM: cost of 3 for VF 4 {{.*}} mul nsw i32 %conv3, %conv
108 ; SLM: cost of 2 for VF 4 {{.*}} mul nsw i32 %conv4, %conv
114 ; SLM: cost of 2 for VF 4 {{.*}} mul nsw i32 %conv5, %conv4
[all …]

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